ML2726 Datasheet, PDF (11/25 Pages) SIRENZA MICRODEVICES – 2.4GHz Low-IF 2.0Mbps FSK Transceiver

15 VTUNE
I
VCO Tuning Voltage input from the PLL
loop filter. This pin is very sensitive to
noise coupling and leakage currents.
ML2726
VCCA
24
1.25V
VTUNE 15
3.7k
26 VBG
28 RSSI
O
Bandgap Decouple Voltage. Decoupled N/A
to ground with a 220nF capacitor.
O
Buffered Analog RSSI output with a
nominal sensitivity of 35mV/dB. In analog
test modes, this pin and the AOUT output
become test access points controlled by
the serial control bus.
8
VSS
TPI
MUX
VCCA
24
RSSI
OP
AMP
RSSI
MUX
100 Ω
28 RSSI
SERIAL BUS SIGNALS
4 EN
I (CMOS)
5 DATA
I (CMOS)
6 CLK
I (CMOS)
Control Bus Enable. Enable pin for the
three-wire serial control bus that sets the
operating frequency and programmable
options. The control registers are loaded
on a low-to-high transition of the signal.
Serial control bus data is ignored when
this signal is high. This is a CMOS input,
and the thresholds are referenced to
VDD and VSS.
Serial Control Bus Data. 16-bit words,
which include programming data and the
two-bit address of a control, register. This
is a CMOS input, and the thresholds are
referenced to VDD and VSS.
Serial control bus data is clocked in on
the rising edge when EN is low. This is a
CMOS input; the thresholds are
referenced to VDD and VSS.
EN 4
DATA 5
CLK 6
VDD
31
5.5k
8
VSS
8
VSS
1.7p
PRELIMINARY DATASHEET
OCT 2007
11
EDS-105982 REV P01