SPF-3143Z Datasheet, PDF (1/3 Pages) SIRENZA MICRODEVICES – Low Noise pHEMT GaAs FET

Product Description
Sirenza Microdevices’ SPF-3143Z is a high performance 0.5μm pHEMT
Gallium Arsenide FET. This 600μm device is ideally biased at 3V, 20mA
for lowest noise performance and battery powered requirements. At
5V, 40mA the device can deliver OIP3 of 32.5 dBm. It provides ideal
performance as a driver stage in many commercial and industrial LNA
applications.
The matte tin finish on Sirenza’s lead-free package utilizes a post annealing
process to mitigate tin whisker formation and is RoHS compliant per EU
Directive 2002/95. This package is also manufactured with green molding
compounds that contain no antimony trioxide nor halogenated fire retardants.
40
35
30
25
20
15
10
5
0
0
Typical Gain Performance
5V 40mA
3V 20mA
Gain
Gmax
2
4
6
8
10
Frequency (GHz)
SPF-3143Z
Pb RoHS Compliant
& Green Package
Low Noise pHEMT GaAs FET
Product Features
• Available in Lead free, RoHS compliant, & Green
packaging
• DC-3.5 GHz Operation
• 0.58 dB NF_MIN @ 2 GHz
• 21 dB G_MAX @ 2 GHz
• +31 dBm OIP3 (5V,40mA)
• +17.7 dBm P1dB (5V,40mA)
• Low Current, Low Cost
• Apps circuits available for key bands
Applications
• Analog and Digital Wireless Systems
• 3G, Cellular, PCS
• Fixed Wireless, Pager Systems
• Driver Stage for Low Power Applications
Symbol
Parameters
Test Conditions
V_DS=5V, I_DQ=40mA, 25C
(unless otherwise noted)
Units
Test Frequency
(GHz)
Min.
Typ.
Max.
G_MAX
Maximum Available Gain
Z_S=Z_S*, Z_L=Z_L*
dB
0.9
23.3
1.9
19.9
NF_MIN
S₂₁
Minimum Noise Figure
Insertion Gain
Z_S=Γ_OPT, Z_L=Z_L*
Z_S=Z_L=50Ω
dB
0.9
1.9
dB
0.9
NF
Noise Figure
Application Circuit
dB
1.9
Gain
Gain
Application Circuit
dB
1.9
Application Circuit,
OIP₃
Output Third Order Intercept Point Tone Spacing = 1MHz,
dBm
1.9
Pout per tone = 0 dBm
P_1dB
Output Power at 1dB Compression Application Circuit
1.9
V_P
Pinchoff Voltage
V_DS = 2V, I_DS = 0.6mA
V
I_DSS
Saturated Drain Current
V_DS = 2V, V_GS = 0 V
mA
g_m
Transconductance
V_DS = 2V, V_GS = 0 V
mS
BVGSO Gate-Source Breakdown Voltage
I_GS= 300 μA, drain open
V
BVGDO Gate-Drain Breakdown Voltage
I_GD= 300 μA, source open
V
0.36
0.58
18.2 19.7 21.2
0.8
1.0
14.1 15.6 17.1
30.5 32.5
19.0 20.5
-1.4 -1.0 -0.6
180
210
-10
-7
-12
-7
V_DS
Device Operating Voltage
drain-source
V
5.5
I_DS
Device Operating Current
drain-source
mA
38
40
42
R_TH, j-l
Thermal Resistance (junction - lead) junction to lead
°C/W
200
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or omissions. Sirenza Microdevices assumes no responsibility for the use of this
information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or
granted to any third party. Sirenza Microdevices does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems.
Copyright 2006 Sirenza Microdevices, Inc. All worldwide rights reserved.
303 Technology Court, Broomfield, CO 80021
Phone: (800) SMI-MMIC
1
http://www.sirenza.com
EDS-103162 Rev C