SHF-0589 Datasheet, PDF (1/4 Pages) List of Unclassifed Manufacturers – 0.05-3 GHz, 2 Watt GaAs HFET

Product Description
Sirenza Microdevices’ SHF-0589 is a high performance AlGaAs/
GaAs Heterostructure FET (HFET) housed in a low-cost sur-
face-mount plastic package. The HFET technology improves
breakdown voltage while minimizing Schottky leakage current
resulting in higher PAE and improved linearity.
Output power at 1dB compression is +33.4 dBm when biased
for Class AB operation at 7V,345mA at 1.96 GHz. The +46.5
dBm third order intercept makes it ideal for high dynamic range,
high intercept point requirements. It is well suited for use in
both analog and digital wireless communication
infrastructure and subscriber equipment including 3G, cellular,
PCS, fixed wireless, and pager systems.
Typical Gain Performance (7V,345mA)
40
35
30
25
20
Gmax
15
10
Gain
5
0
0
1
2
3
4
5
6
Frequency (GHz)
SHF-0589
0.05-3 GHz, 2 Watt
GaAs HFET
Product Features
• High Linearity Performance at 1.96 GHz
+33.4 dBm P1dB
+46.5 dBm OIP3
+26 dBm IS-95 Channel Power
+11.5 dB Gain
• +23.7 dBm W-CDMA Channel Power
• High Drain Efficiency (>50% at P1dB)
Applications
• Analog and Digital Wireless Systems
• 3G, Cellular, PCS
• Fixed Wireless, Pager Systems
Symbol Device Characteristics
Test Conditions, 25C
(^Vu^Dn^Sl⁼es⁷s^V,o^It^Dh^Qe⁼r³w⁴is⁵e^mn^Aoted)
Test
Frequency
Units
Min
Typ
Max
Gmax Maximum Available Gain
Z_S=Z_S*, Z_L=Z_L*
0.90 GHz
dB
-
22.9
-
1.96 GHz
dB
-
17.4
-
2.14 GHz
dB
-
16.6
-
S₂₁
Gain
Insertion Gain ^[1]
Power Gain ^[2]
Z_S=Z_L= 50 Ohms
Application Circuit
0.90 GHz
1.96 GHz
dB
dBm
14.1
10.3
15.7
11.5
17.3
12.7
OIP3
Output Third Order Intercept Point ^[2]
Application Circuit
1.96 GHz
dBm
44
46.5
-
P1dB Output 1dB Compression Point ^[2]
Application Circuit
1.96 GHz
dBm 31.9
33.4
-
P_CHAN
NF
IS-95 Channel Power (-45dBc ACPR)
Noise Figure ^[2]
Application Circuit
Application Circuit
1.96 GHz
dBm
-
26.2
-
1.96 GHz
dB
-
3.7
-
I_DSS
g_m
V_P
BV_GS
BV_GD
Rth
Saturated Drain Current
Tranconductance
Pinch-Off Voltage ^[1]
Gate-Source Breakdown Voltage ^[1]
Gate-Drain Breakdown Voltage ^[1]
Thermal Resistance
V_DS= V_DSP, V_GS= 0V
V_DS= V_DSP, V_GS= -0.25V
V_DS= 2.0V, I_DS= 2.4mA
I_GS= 4.8mA, drain open
I_GD= 4.8mA, V_GS= -5.0V
junction-to-lead
mA
mS
V
V
V
o_C/W
816
576
-3.0
-
-
-
1176
792
-1.9
-17
-22
23
1536
1008
-1.0
-15
-17
-
V_DS
I_DQ
P_DISS
Operating Voltage ^[3]
Operating Current ^[3]
Power Dissipation ^[3]
drain-source
drain-source, quiescent
V
-
mA
-
C
-
-
8.0
-
480
-
2.4
[1] 100% tested - Insertion gain tested using a 50 ohm contact board (no matching circuitry) during final production test.
[2] Sample tested - Samples pulled from each wafer/package lot. Sample test specifications are based on statistical data from sample test measurements. The test fixture is
an engineering application circuit board. The application circuit was designed for the optimum combination of linearity, P1dB, and VSWR.
[3] Maximum recommended power dissipation is specified to maintain T_J<140C at T_L=85C. V_DS * I_DQ< 2.4W is recommended for continuous reliable operation.
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or omissions.
Sirenza Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user’s own risk. Prices and specifications are
subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Sirenza Microdevices does not
authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems.
Copyright 2002 Sirenza Microdevices, Inc. All worldwide rights reserved.
522 Almanor Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC
http://www.sirenza.com
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EDS-101242 Rev F