SHF-0289 Datasheet, PDF (1/4 Pages) List of Unclassifed Manufacturers – DC-3 GHz, 1.0 Watt GaAs HFET

SHF-0289
Product Description
SHF-0289Z Pb RoHS Compliant
& Green Package
Sirenza Microdevices’ SHF-0289 is a high performance AlGaAs/GaAs
Heterostructure FET (HFET) housed in a low-cost surface-mount plastic _{0.05 - 6 GHz, 1.0 Watt}
GaAs HFET ^{package. The HFET technology improves breakdown voltage while minimizing}
Schottky leakage current resulting in higher PAE and improved linearity.
Output power at 1dB compression for the SHF-0289 is +30dBm when
biased for Class AB operation at 7V,200mA. The +43 dBm third order
intercept makes it ideal for high dynamic range, high intercept point
requirements. It is well suited for use in both analog and digital wireless
communication infrastructure and subscriber equipment including 3G,
cellular, PCS, fixed wireless, and pager systems.
The matte tin finish on Sirenza’s lead-free package utilizes a post anneal-
ing process to mitigate tin whisker formation and is RoHS compliant per EU
Product Features
Directive 2002/95. This package is also manufactured with green molding _{• Now available in Lead Free, RoHS}
compounds that contain no antimony trioxide nor halogenated fire retar- _{Compliant, & Green Packaging}
dants.
• High Linearity Performance at 1.96 GHz
Typical Gain Performance (7V,200mA)
+30 dBm P1dB
40
35
30
25
20
15
Gmax
10
5
Gain
0
+43 dBm OIP3
+23.7 dBm IS-95 Channel Power
+14.6 dB Gain
• +21.7 dBm W-CDMA Channel Power
• High Drain Efficiency (>50% at P1dB)
• See App Note AN-032 for circuit details
Applications
0123456
Frequency (GHz)
• Analog and Digital Wireless Systems
• 3G, Cellular, PCS
• Fixed Wireless, Pager Systems
S y m b o l D e v ic e C h a ra c te ris tic s
T e s t C o n d itio n s , 2 5 C
V _{D S} = 7 V , I_{D Q} = 2 0 0 m A
(u n le s s o th e rw is e n o te d )
Te s t
F re q u e n c y
U n its
M in
Typ
M ax
Gm ax
M a x i m u m A v a i la b le G a i n
Z_S= Z_S*, Z _L= Z_L*
0 .9 0 G H z
dB
1 .9 6 G H z
dB
2 .1 4 G H z
dB
-
23
-
-
20
-
-
1 9 .5
-
S ₂₁
G a in
In s e r ti o n G a i n ^{[1 ]}
P o w e r G a i n ^{[2 ]}
Z_S= Z_L= 5 0 O hm s
A p p lic a tio n C irc u it
0 .9 0 G H z
1 .9 6 G H z
dB
dB m
1 6 .7
1 3 .1
1 8 .5
1 4 .6
2 0 .3
1 6 .1
O IP 3
O u tp u t T h i r d O r d e r In te r c e p t P o i n t ^{[2 ]}
A p p lic a tio n C irc u it
1 .9 6 G H z
dB m
4 0 .5
4 3 .0
-
P 1dB
O u tp u t 1 d B C o m p r e s s i o n P o i n t ^{[2 ]}
A p p lic a tio n C irc u it
1 .9 6 G H z
dB m
2 8 .7
3 0 .2
-
P _{C HAN}
NF
IS - 9 5 C h a n n e l P o w e r ( - 4 5 d B c A C P R )
N o i s e F i g u re ^{[2 ]}
A p p lic a tio n C irc u it
A p p lic a tio n C irc u it
1 .9 6 G H z
dB m
-
2 3 .7
-
1 .9 6 G H z
dB
-
4 .0
-
I_{D S S}
g_m
V_P
B V _GS
B V _GD
R th
S a tu ra te d D ra in C u rre n t
Tra n c o n d u c ta n c e
P i n c h - O ff V o lta g e ^{[1 ]}
G a te - S o u r c e B r e a k d o w n V o lta g e ^{[1 ]}
G a te - D r a i n B r e a k d o w n V o lta g e ^{[1 ]}
T h e rm a l R e s is ta n c e
V _DS= V _DSP, V _GS= 0 V
V _{D S} = V _{D S P} , V _{G S} = -0 .2 5 V
V _{D S} = 2 . 0 V , I_{D S} = 1 . 2 m A
I_{G S} = 2 . 4 m A , d r a i n o p e n
I_{G D} = 2 . 4 m A , V _{G S} = - 5 . 0 V
ju n c ti o n -to -le a d
mA
mS
V
V
V
o_{C /W}
408
288
-3 .0
-
-
-
588
396
-1 .9
-1 7
-2 2
41
768
504
-1 .0
-1 5
-1 7
-
V _DS
O p e r a ti n g V o lta g e ^{[3 ]}
d ra in-s o urc e
V
-
-
8 .0
I_{D Q}
O p e ra ti n g C u rr e n t ^{[3 ]}
d ra in-s o urc e , q uie s c e nt
mA
-
-
280
P _{D IS S}
P o w e r D i s s i p a ti o n ^{[3 ]}
C
-
-
1 .4
[1] 100% tested - Insertion gain tested using a 50 ohm contact board (no matching circuitry) during final production test.
[2] Sample tested - Samples pulled from each wafer/package lot. Sample test specifications are based on statistical data from sample test measurements. The test fixture is an engineering application circuit board.
The application circuit was designed for the optimum combination of linearity, P1dB, and VSWR.
[3] Maximum recommended power dissipation is specified to maintain T_J<140C at T_L=85C. V_DS * I_DQ< 1.4W is recommended for continuous reliable operation.
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or omissions.
Sirenza Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent
rights or licenses to any of the circuits described herein are implied or granted to any third party. Sirenza Microdevices does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or
systems. Copyright 2002 Sirenza Microdevices, Inc. All worldwide rights reserved.
303 S. Technology Court, Broomfield, CO 80021
Phone: (800) SMI-MM
1
http://www.sirenza.com
EDS-101241 Rev E