SP486E Datasheet, PDF (8/11 Pages) Sipex Corporation – Enhanced Quad RS-485/RS-422 Line Drivers

The circuit model in Figures 6 and 7 represent
the typical ESD testing circuit used for all three
methods. The C_S is initially charged with the DC
power supply when the first switch (SW1) is on.
Now that the capacitor is charged, the second
switch (SW2) is on while SW1 switches off. The
voltage stored in the capacitor is then applied
through R_S, the current limiting resistor, onto the
device under test (DUT). In ESD tests, the SW2
switch is pulsed so that the device under test
receives a duration of voltage.
For the Human Body Model, the current limiting
resistor (R_S) and the source capacitor (C_S) are
1.5kW an 100pF, respectively. For IEC-1000-4-2,
the current limiting resistor (R ) and the source
S
capacitor (C_S) are 330W an 150pF, respectively.
The higher C_S value and lower R_S value in the
IEC1000-4-2 model are more stringent than the
Human Body Model. The larger storage capacitor
injects a higher voltage to the test point when
SW2 is switched on. The lower current limiting
resistor increases the current charge onto the test
point.
DEVICE PIN
TESTED
Driver Outputs
Receiver Inputs
HUMAN BODY
IEC1000-4-2
MODEL
Air Discharge Direct Contact
+15kV
+15kV
+15kV
+15kV
+8kV
+8kV
Table 3. Transceiver ESD Tolerance Levels
Level
4
4
SP486E/487EDS/06
SP486E/487E Enhanced Quad RS-485/RS-422 Line Drivers
8
© Copyright 2000 Sipex Corporation