SP6122_04 Datasheet, PDF (7/19 Pages) Sipex Corporation – Low Voltage, Micro 8, PFET, Buck Controller Ideal for 1A to 5A, Small Footprint, DC-DC Power Converters

Power On Reset (POR): continued
internal 1.25V is greater than the 1 V thresh-
old. Note this is a “loose” threshold and should
not be used to guarantee under voltage lock
out with respect to V_CC. Care should be take
to ensure that V_CC does not “get stuck” on the
way to its regulated value.
Soft Start
Soft start is required on step-down control-
lers to prevent excess inrush current through
the power train during start-up. On the
SP6122, this is managed through turning
the PFET switch on with a fixed frequency
clock and then turning the switch off when
divided down version of the output voltage
exceeds the internal SS voltage ramp. The
internal SS voltage ramp rises with a 0.5 V/
ms slew rate and the internal feedback
voltage follows this rate of change. The
presence of the output capacitor creates
extra current draw during startup. Since
dV_OUT/dt creates an average sustained cur-
rent in the output capacitor, this current
must be considered while calculating peak
SS
Voltage
0.25V
0V
Comparator
Reference
Voltage _1.25V
0V
Inductor
Current
I_LOAD
0A
SWN
Voltage
V(V_IN)
0V
dV_SS/dt = 0.5Vms
TIME
inrush current and over current thresholds.
An expression to determine the excess in-
rush current due to the dV_OUT/dt of the
output capacitor is:
IC_OUT = C_OUT*0.5 V/ms *
V_{OUT ,}
V_R
where VR is the internal reference voltage.
Lock Up & Hiccup Modes
As previously stated, if the SP6122 detects
an over current condition and initiates a
fault, the power supply remains “locked up”.
That is, the FFLAG pin immediately pulls
low (if loaded) and the PFET switch turns
off. This condition is permanent unless the
either the V_CC or ENABLE is cycled. How-
ever if FFLAG is tied to ENABLE, the SP6122
will restart without assistance (Hiccup
Mode). Furthermore, the restart time can be
controlled by the addition of a small capaci-
tor on the ENABLE pin to ground. The
restart time is equal to the amount of time it
takes for the 5µA ENABLE pin current to
charge the external capacitor to an NFET
threshold (roughly 1V). The waveforms that
describe the Hiccup Mode operation are
shown below.
150mV
VI_SET - VI_SENSE
0V
V(V_CC)
FFLAG
Voltage
0V
V(V_CC)
ENABLE
Voltage
1.0V
0V
V(V_CC)
PDRV
Voltage
0V
dV_ENABLE/dt = 4µA/C_ENABLE
TIME
Date: 10/02/04
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
7
© Copyright 2004 Sipex Corporation