SP1485E Datasheet, PDF (4/11 Pages) Sipex Corporation – Enhanced Low Power Half-Duplex RS-485 Transceivers

RO 1
R
8 V_CC
RE 2
7B
DE 3
DI 4
6A
D
SP485 ^{5 GND}
Top View
SP1485E
Pinout (Top View)
PIN FUNCTION
Pin 1 – RO – Receiver Output.
Pin 2 – RE – Receiver Output Enable Active LOW.
Pin 3 – DE – Driver Output Enable Active HIGH.
Pin 4 – DI – Driver Input.
Pin 5 – GND – Ground Connection.
Pin 6 – A – Driver Output/Receiver Input
Non-inverting.
Pin 7 – B – Driver Output/Receiver Input Inverting.
Pin 8 – Vcc – Positive Supply 4.75V<Vcc< 5.25V.
A
R
V_OD
B
R ^VOC
Figure 1. RS-485 Driver DC Test Load Circuit
Receiver ^{Test Point}
Output
C_RL
S₁
1k
1k
V_CC
S₂
Figure 2. Receiver Timing Test Load Circuit
DI
A ^RDI^CFFL1
A
RO
B
B
C_L2
15pF
Output
500
S₁
V_CC
Under
Test
C_L
S₂
Figure 3. RS-485 Driver/Receiver Timing Test Circuit ^{Figure 4. RS-485 Driver Timing Test Load #2 Circuit}
+3V
DI
0V
B
DRIVER
OUTPUT _A
DIFFERENTIAL V_O⁺
OUTPUT 0V
V_A – V_B ^VO^–
t_{SKEW = |} t_{DPLH -} t_{DPHL |}
f = 1MHz; t_R < 1.0ns; t_F < 1.0ns
1.5V
1.5V
t_PLH
t_PHL
V_O ^1/2VO
t_DPLH
t_DPHL
t_R
1/2V_O
t_F
Figure 5. Driver Propagation Delays
Rev:C Date: 02/26/04
SP1485E Low Power Half-Duplex RS485 Transceivers
4
© Copyright 2004 Sipex Corporation