SP6203 Datasheet, PDF (3/14 Pages) Sipex Corporation – Low Noise, 300mA and 500mA CMOS LDO Regulators

ELECTRICAL CHARACTERISTIC NOTES
Note 1: Maximum power dissipation can be calculated using the formula: P_D = (T_J(max) - T_A) / θ_JA, where T_J(max) is
the junction temperature, T_A is the ambient temperature and θ_JA is the junction-to-ambient thermal resistance. θ_JC
is 6ºC/W for this package. Exceeding the maximum allowable power dissipation will result in excessive die
temperature and thermal shutdown protection. For 5 Pin SOT-23 θ_JA is 191°C/W and 59°C/W for the 8 Pin DFN. A
part mounted on a PC board will deliver improved thermal perfformance based on copper surface area.
Note 2: Output voltage temperature coefficient is defined as the worst case voltage change divided by the total
temperature range.
Note 3: Regulation is measured at constant junction temperature using low duty cycle pulse testing. Changes in
output voltage due to heating effects are covered by the thermal regulation specification.
Note 4: Dropout-voltage is defined as the input to output differential at which the output voltage drops 2% below its
nominal value measured at 1V differential.
Note 5: Ground pin current is the regulator quiescent current. The total current drawn from the supply is the sum of
the load current plus the ground pin current.
Note 6: Output noise voltage is defined within a certain bandwidth, namely 10Hz < BW < 100kHz. An external
bypass cap (10nF) from reference output (BYP pin) to ground significantly reduces noise at output.
Note 7: Thermal regulation is defined as the change in output voltage at a time “t” after a change in power
dissipation is applied, excluding load and line regulation effects.
Specifications are for a 300mA load pulse at V_IN = 6V for t = 1ms.
Note 8: The wake-up time (T_WU) is defined as the time it takes for the output to start rising after enable is brought
high.
Note 9: The total turn-on time is called the settling time (T_S), which is defined as the condition when both the
output and the bypass node are within 2% of their fully enabled values when released from shutdown.
Note 10: For output voltage versions requiring VIN to be lower than 4V, timing (T_ON & T_OFF) increases slightly.
FUNCTIONAL DIAGRAM
VIN
EN
bandgap ^1.25V
reference
V_OUT
V_IN
EN
bandgap ^1.25V
reference
V_OUT
R1
current limit
&
thermal shutdown
GND
BYP
Cbyp
(optional)
ADJ
current limit
&
thermal shutdown
R2
GND
Low Noise Fixed Regulator - 5 Pin
Low Noise Adjustable Regulator - 5 Pin
Date: 05/25/04
SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators
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© Copyright 2004 Sipex Corporation