SP3244E Datasheet, PDF (12/22 Pages) Sipex Corporation – 3.0V to 5.5V RS-232 Transceivers with Auto On-Line® Plus

Phase 2
VSS transfer and invert: Phase two connects
the negative terminal of C2 to the VSS stor-
age capacitor and the positive terminal of C2 to
ground. This transfers the doubled and inverted
(V–) voltage onto C4. Meanwhile, capacitor
C1 charged from VCC to prepare it for its next
phase.
DESCRIPTION
surface mount ceramic capacitors (such as are
widely used for power-supply decoupling) are
ideal for use on the charge pump. The charge
pumps are designed to be able to function prop-
erly with a wide range of capacitor styles and val-
ues. If polarized capacitors are used the positive
and negative terminals should be connected as
shown on the Typical Operating Circuit.
Phase 3
VDD charge store and double: Phase three is
identical to the first phase. The positive ter-
minals of capacitors C1 and C2 are charged
from VCC with their negative terminals initially
connected to ground. C1+ is then connected
to ground and the stored charge from C1– is
superimposed onto C2–. Since C2+ is still
connected to VCC the voltage potential across
capacitor C2 is now 2 x VCC.
Phase 4
VDD transfer: The fourth phase connects the
negative terminal of C2 to ground and the posi-
tive terminal of C2 to the VDD storage capacitor.
This transfers the doubled (V+) voltage onto C3.
Meanwhile, capacitor C1 charged from VCC to
prepare it for its next phase.
The Sipex chargepump generates V+ and
V– independently from VCC. Hence in a no–load
condition V+ and V- will be symmetrical. Older
charge pump approaches generate V+ and then
use part of that stored charge to generate V-.
Because of inherent losses the magnitude of V-
will be smaller than V+ on these older designs.
Under lightly loaded conditions the intelligent
pump oscillator maximizes efficiency by running
only as needed to maintain V+ and V–. Since
interface transceivers often spend much of their
time at idle this power-efficient innovation can
greatly reduce total power consumption. This
improvement is made possible by the indepen-
dent phase sequence of the Sipex charge-pump
design.
The clock rate for the charge pump typically op-
erates at greater than 70kHz allowing the pump
to run efficiently with small 0.1µF capacitors.
Efficient operation depends on rapidly charging
and discharging C1 and C2, therefore capacitors
should be mounted close to the IC and have low
ESR (equivalent series resistance). Inexpensive
Capacitance values may be increased if operat-
ing at higher VCC or to provide greater stability as
the capacitors age. See Charge Pump Capacitor
Value table on page 11.
Auto On-line^® Plus Circuitry
The SP3244E/3245E devices have the advanced
Auto On-line^® Plus feature that saves power by
turning off the charge pumps and driver outputs
when the transceiver inputs are idle for more
than 30 seconds.
RS-232 signals use both positive and negative
voltages of greater than ±5V magnitude. Receiv-
ers have nominal 5kΩ impedance to ground.
Even when idle, drivers will maintain output
signal voltage creating a continuous current
flow. In low power battery operated devices this
constant current drain can decrease battery life
significantly.
Receiver
5kΩ
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Auto On-line^® Plus devices may be configured
to emulate the behavior of devices with our
earlier Auto On-line^® feature. Auto On-line^®
Plus puts the device into a low power mode
when driver and receiver inputs are idle and re-
awakes upon detecting signal transitions. Auto
On-line^® puts the device into a low power mode
when receiver inputs are left floating and re-
awakes when receivers are driven greater than
±2.7V magnitude by incoming RS-232 signal.
Rev M 10/9/06
SP3244E-SP3245E, 3.0V to 5.5V RS-232 Transceivers with Auto On-Line^® Plus
12
© Copyright 2006 Sipex Corporation