U635H64 Datasheet, PDF (7/14 Pages) List of Unclassifed Manufacturers – POWER STORE 8K X 8 NVSRAM

Nonvolatile Memory Operations
U635H64
Mode Selection
E
W
A12 - A0
(hex)
Mode
I/O
H
X
X
Not Selected
Output High Z
L
H
X
Read SRAM
Output Data
L
L
X
Write SRAM
Input Data
L
H
0000
1555
0AAA
1FFF
10F0
0F0F
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile STORE
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
L
H
0000
1555
0AAA
1FFF
10F0
0F0E
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile RECALL
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Power
Standby
Active
Active
Active
Active
Notes
m
k, l
k, l
k, l
k, l
k, l
k
k, l
k, l
k, l
k, l
k, l
k
k: The six consecutive addresses must be in order listed (0000, 1555, 0AAA, 1FFF, 10F0, 0F0F) for a Store cycle or
(0000, 1555, 0AAA, 1FFF,10F0, 0F0E) for a RECALL cycle. W must be high during all six consecutive cycles.
See STORE cycle and RECALL cycle tables and diagrams for further details.
The following six-address sequence is used for testing purposes and should not be used: 0000, 1555, 0AAA, 1FFF, 10F0, 139C.
l: Activation of nonvolatile cycles does not depend on the state of G.
m: I/O state assumes that G ≤ V_IL.
No.
PowerStore
Power Up RECALL
24 Power Up RECALL Duration^{n, e}
Symbol
Alt.
IEC
t_RESTORE
25 STORE Cycle Duration^f
t_PDSTORE
26
Time allowed to Complete SRAM Cycle^f,
e
t_DELAY
Conditions
Min.
the power supply vol-
tage must stay above
3.6 V for at least
10 ms after the start
of the STORE
operation
Max.
650
10
1
Unit
μs
ms
μs
Low Voltage Trigger Level
V_SWITCH
4.0 4.5 V
n: t_RESTORE starts from the time V_CC rises above V_SWITCH.
March 31, 2006
STK Control #ML0052
7
Rev 1.0