U630H16PA35 Datasheet, PDF (1/15 Pages) Simtek Corporation – HardStore 2K x 8 nvSRAM

Not Recommended For New Designs
U630H16PA35
HardStore 2K x 8 nvSRAM
Features
Description
‡ High-performance CMOS nonvo- The U630H16 has two separate
latile static RAM 2048 x 8 bits
‡ 35 ns Access Time
‡ 20 ns Output Enable Access
modes of operation: SRAM mode
and nonvolatile mode, determined
by the state of the NE pin.
Time
‡ Hardware STORE Initiation
In SRAM mode, the memory ope-
rates as an ordinary static RAM. In
(STORE Cycle Time < 10 ms) nonvolatile operation, data is trans-
‡ Automatic STORE Timing
ferred in parallel from SRAM to
‡ 10⁶ STORE cycles to EEPROM EEPROM or from EEPROM to
‡ 100 years data retention in SRAM. In this mode SRAM
EEPROM
functions are disabled.
‡ Automatic RECALL on Power Up The U630H16 is a fast static RAM
‡ Hardware RECALL Initiation
(35ns), with a nonvolatile electri-
(RECALL Cycle Time < 20 μs) cally erasable PROM (EEPROM)
‡ Unlimited RECALL cycles from element incorporated in each static
EEPROM
memory cell. The SRAM can be
‡ Unlimited Read and Write to read and written an unlimited num-
SRAM
‡ Single 5 V ± 10 % Operation
ber of times, while independent
nonvolatile data resides in
‡ Operating temperature range:
EEPROM. Data transfers from the
-40 to125 °C
‡ QS 9000 Quality Standard
SRAM to the EEPROM (the
STORE operation), or from the
‡ ESD characterization according EEPROM to the SRAM (the
‡ MIL STD 883C M3015.7-HBM RECALL operation) are initiated
(classification see IC Code Num- through the state of the NE pin.
bers)
‡ Package: PLCC32
The U630H16 combines the high
performance and ease of use of a
fast SRAM with nonvolatile data
integrity.
Once a STORE cycle is initiated,
further input or output are disabled
until the cycle is completed.
Internally, RECALL is a two step
procedure. First, the SRAM data is
cleared and second, the nonvola-
tile information is transferred into
the SRAM cells.
The RECALL operation in no way
alters the data in the EEPROM
cells. The nonvolatile data can be
recalled an unlimited number of
times.
Pin Configuration
A6
A5
A4
A3
A2
A1
A0
n.c.
DQ0
4 3 2 1 32 31 30
5
29
6
28
7
27
8
26
9
25
10
24
11
23
12
22
13
21
14 15 16 17 18 19 20
A8
A9
n.c.
n.c.
G
A10
E
DQ7
DQ6
Top View
August 15, 2006
STK Control #ML0038
Pin Description
Signal Name
A0 - A10
DQ0 - DQ7
E
G
W
NE
VCC
VSS
n.c.
(VCC)
Signal Description
Address Inputs
Data In/Out
Chip Enable
Output Enable
Write Enable
Nonvolatile Enable
Power Supply Voltage
Ground
not connected
Power Supply Voltage
(optional)
1
Rev 1.1