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| STK16CA8 Datasheet, PDF (1/12 Pages) Simtek Corporation – 128K x 8 AutoStorePlus™ nvSRAM QuantumTrap™ CMOS Nonvolatile Static RAM | |||
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STK16CA8
128K x 8 AutoStorePlus⢠nvSRAM
QuantumTrap⢠CMOS
Nonvolatile Static RAM
Preliminary
FEATURES
DESCRIPTION
⢠25ns, 35ns and 45ns Access Times
⢠Directly Replaces 128K x 8 Static RAM, Bat-
tery-Backed RAM or EEPROM
⢠Transparent Data Save on Power Down
⢠STORE to QuantumTrap⢠Nonvolatile Ele-
ments is Initiated by Software or AutoStore-
Plusâ¢on Power Down
⢠RECALL to SRAM Initiated by Software or
Power Restore
⢠5mA Typical ICC at 200ns Cycle Time
⢠Unlimited READ and WRITE Cycles to SRAM
⢠100-Year Data Retention to Quantum Trap
⢠Single 3V +20%, -10% Operation
⢠Commercial and Industrial Temperatures
⢠32-Pin DIP Package
The Simtek STK16CA8 is a fast static RAM with a
nonvolatile element in each static memory cell. The
embedded nonvolatile elements incorporate
Simtekâs QuantumTrap⢠technology producing the
worldâs most reliable nonvolatile memory. The SRAM
provides unlimited read and write cycles, while inde-
pendent, nonvolatile data resides in the nonvolatile
elements. Data transfers from the SRAM to the non-
volatile elements (the STORE operation) can take
place automatically on power down or under soft-
ware control. An internal capacitor guarantees the
STORE operation, even under extreme power-down
slew rates or loss of power from âhot swappingâ.
Transfers from the nonvolatile elements to the SRAM
(the RECALL operation) take place automatically on
restoration of power. Initiation of STORE and RECALL
cycles can also be controlled by entering control
sequences on the SRAM inputs. The STK16CA8 is
pin-compatible with 128k x 8 SRAMs and battery-
backed SRAMs, allowing direct substitution while
providing superior performance.
BLOCK DIAGRAM
PIN CONFIGURATIONS
VCC
NC 1
A16 2
32 VCC
31 A15
A14 3
30 NC
Quantum Trap
A5
A6
1024 x 1024
POWER
CONTROL
A12 4
A7 5
A6 6
A5 7
29 W
28 A13
27 A8
26 A9
A7
STORE
A8
A9
A12
A13
STATIC RAM
ARRAY
1024 x 1024
RECALL
STORE/
RECALL
CONTROL
A14
A15
A16
A4 8
A3 9
A2 10
A1 11
A0 12
DQ0 13
DQ1 14
DQ2 15
VSS 16
25 A11
24 G
23 A10
22 E
21 DQ7
20 DQ6
19 DQ5
18 DQ4
17 DQ3
DQ0
COLUMN I/O
DQ1
SOFTWARE
DETECT
A0 - A15
PIN NAMES
A0 - A16
Address Inputs
DQ2
COLUMN DEC
DQ3
W
Write Enable
DQ4
DQ5
DQ6
A0 A1 A2 A3 A4 A10 A11
DQ0 - DQ7
Data In/Out
G
E
Chip Enable
DQ7
G
Output Enable
E
W
VCC
Power (+ 3V)
VSS
Ground
September 2003
1 Document Control # ML0023 rev 0.1
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