SII1151 Datasheet, PDF (8/44 Pages) Silicon image – PanelLink Receiver

General DC Specifications
Under normal operating conditions unless otherwise specified.
SiI 1151 PanelLink Receiver
Data Sheet
Table 1. DC Parametric Specifications
Symbol
Parameter
Conditions
Min Typ Max Units Notes
V_ID
Differential Input Voltage
Single Ended Amplitude
75
1000
mV
I_PD
Power-down Current
PD#=LOW, no RXC+
input
5
mA
3
I_PDO
Receiver Supply Current
ODCK=112MHz,
with Outputs Powered Down _{1 pixel per clock mode}
220
mA
3, 4
PDO# = LOW
I_CCR
Receiver Supply Current
for Active Device
ODCK=112MHz, 0°C
1 pixel per clock mode
220
330
mA
1, 2, 4
PDO#=HIGH
Typ: Typical Pattern
Max: Worst Case Pattern
Notes
1.
2.
3.
4.
The Typical Pattern contains a gray scale area, checkerboard area, and text.
The Worst Case Pattern consists of a black and white checkerboard pattern; each checker is two pixels wide.
Asserting PD# to LOW disables all internal logic and outputs, including SCDT and clock detect functions. The
inactive input clock accounts for most of the power reduction.
Specified with capacitive load (C_LOAD) of 10pF on each output pin, and a worst-case TMDS signal swing of 600mV.
SiI-DS-0023-C
4