EFM32ZG222 Datasheet, PDF (3/66 Pages) Silicon image – Energy, gas, water and smart metering

Preliminary
2 System Summary
...the world's most energy friendly microcontrollers
2.1 System Introduction
The EFM32 MCUs are the world’s most energy friendly microcontrollers. With a unique combination
of the powerful 32-bit ARM Cortex-M0+, innovative low energy techniques, short wake-up time from
energy saving modes, and a wide selection of peripherals, the EFM32ZG microcontroller is well suited
for any battery operated application as well as other systems requiring high performance and low-energy
consumption. This section gives a short introduction to each of the modules in general terms and also
shows a summary of the configuration for the EFM32ZG222 devices. For a complete feature set and in-
depth information on the modules, the reader is referred to the EFM32ZG Reference Manual.
A block diagram of the EFM32ZG222 is shown in Figure 2.1 (p. 3) .
Figure 2.1. Block Diagram
ZG222F32/ 16/ 8/ 4
Core and Mem ory
Clock Managem ent
ARM Cortex ™ M0+ processor
High Freq
Cr yst al
Osci l l at o r
High Freq
RC
Osci l l at o r
Flash
Pr o g r am
Mem o r y
RAM
Mem o r y
Deb u g
In t er f ace
DMA
Co n t r o l l er
Low Freq
Cr yst al
Osci l l at o r
Low Freq
RC
Osci l l at o r
Ultra Low Freq
RC
Osci l l at o r
Energy Managem ent
Vo l t ag e
Reg u l at o r
Vo l t ag e
Com parator
Brown- out
Det ect o r
Power- on
Reset
Serial Interfaces
USART
I²C
Low
En er g y
Uar t ™
32- bit bus
Peripheral Ref lex Syst em
I/ O Ports
Ex ternal
In t er r u p t s
Gen er al
Pu r p o se
I/ O
Tim ers and Triggers
Ti m er /
Co u n t er
Real Tim e
Co u n t er
Pin
Reset
Pin
Wak eu p
Pulse
Co u n t er
Wat ch d o g
Ti m er
Analog Interfaces
ADC
Analog
Com parator
Cu r r en t
DAC
Secu r i t y
Har d w ar e
AES
2.1.1 ARM Cortex-M0+ Core
The ARM Cortex-M0+ includes a 32-bit RISC processor which can achieve as much as 0.9 Dhrystone
MIPS/MHz. A Wake-up Interrupt Controller handling interrupts triggered while the CPU is asleep is in-
cluded as well. The EFM32 implementation of the Cortex-M0+ is described in detail in ARM Cortex-M0+
Devices Generic User Guide.
2.1.2 Debug Interface (DBG)
This device includes hardware debug support through a 2-pin serial-wire debug interface.
2.1.3 Memory System Controller (MSC)
The Memory System Controller (MSC) is the program memory unit of the EFM32ZG microcontroller.
The flash memory is readable and writable from both the Cortex-M0+ and DMA. The flash memory is
divided into two blocks; the main block and the information block. Program code is normally written to
the main block. Additionally, the information block is available for special user data and flash lock bits.
There is also a read-only page in the information block containing system and device calibration data.
Read and write operations are supported in the energy modes EM0 and EM1.
2013-10-09 - EFM32ZG222FXX - d0066_Rev0.60
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