SC51D01F16A Datasheet, PDF (9/21 Pages) Silan Microelectronics Joint-stock – REMOTE CONTROL WITH BUILT-IN FLASH AND CODE SAMPLING FUNCTION

SC51D01Fxx
S51 MCU
SC51D01Fxx series use S51 MCU compatible with MCS-51 instructions. Users can develop the software using
standard 805x assembler and compiler.
The difference between S51 MCU and standard 8051 lies in:
¾ S51 MCU supports dual DPTR.
¾ In the condition of the same external oscillator frequency, the instruction period of S51 MCU is
shorter than that of 8051.
¾ S51 MCU supports two extended RAM.
¾ S51 MCU’s MOVX A,@Ri and MOVX @Ri, A commands can only access 00H~FFH of on-chip
XRAM.
¾ S51 MCU only supports 2 interrupt sources: the overflow interrupt of timer 0 and timer 1. The
interrupt vector is different from that of standard 8051.
¾ S51 MCU only supports 2 working modes: normal working and standby modes. The working mode
control is also different from that of standard 8051.
RESET
SC51D01Fxx series has external reset, keying reset, power down reset and watchdog reset 4 reset sources.
Where, the external reset, keying reset and power down reset can make the chip awake from standby mode.
External rset
External reset is adding a no less than 10ms low level on pin nRST to make MCU reset.
Connect tandem resistor and capacitor to pin nRST to implement the power on reset of MCU, shown in Fig. 4:
Fig. 4– External reset and power on reset circuit
Keying reset
Keying reset means that when MCU is in standby mode, apply effective time of low level to any one or more
keyboard input ports among KI0~KI7 to make MCU reset. This is often used to awake the MCU by keying.
In normal working mode, applying low level to KI0~KI7 will not make the MCU reset.
Power down reset
When power down or VDD is dropped to less than 1.85V caused by power fluctuation, the low voltage detector
(LVD) will generate a reset signal to make MCU reset.If VDD returns to more than 1.95V, MCU will exit the reset
state, and enter normal working state.
Watchdog reset
The watchdog reset make MCU reset when the internal 20-bit counter (watchdog timer WDT) overflows. The
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