SC9270C Datasheet, PDF (10/12 Pages) Silan Microelectronics Joint-stock – DTMF RECEIVER

Silan
Semiconductors
SC9270C/D
continues to drive high as long as ESt remains high. Finally after a short delay to allow the output latch to settle, the
“delayed-steering” output flag, StD, goes high, signaling that a received tone-pair has been registered.The contents
of the output latch are made available on the 4-bit output bus by raising the 3-state control input (TOE) to a logic
high. The steering circuit works in reverse to validate the interdigit pause between signals. Thus, as well as rejecting
signals too short to be considered valid, the receiver will tolerate signal interruptions (“drop-out”) too short to be
considered a valid pause. The facility, together with the capability of selecting the steering time-constants externally,
allows the designer to tailor performance to meet a wide variety of system requirements.
4. GUARD TIME ADJUSTMENT
In many situations not requiring independent selection of receive and pause, the simple steering circuit of Fig.6 is
applicable. Component values are chosen according to the following formulae:
tREC = tDP + tGTP
tID = tDA + tGTA
The value of tDP is a parameter of the device (see table) and tREC is the minimum signal duration to be recognized
by the receiver. A value for C of 0.1µF is recommended for most applications, leaving R to be selected by the
designer. For example, a suitable value of R for a tREC of 40mS would be 300k. Different steering arrangements
may be used to select independently the guard-times for tone-present (tGTP ) and tone-absent (tGTA ). This may be
necessary to meet system specifications which place both accept and reject limits on both tone duration and
interdigital pause. Guard-time adjustment also allows the designer to tailor system parameters such as talk off and
noise immunity. Increasing tREC improves talk-off performance, since it reduces the probability that tones simulated
by speech will maintain signal condition for long enough to be registered. On the other hand, a relatively short tREC
with a long tDO would be appropriate for extremely noisy environments where fast acquisition time and immunity to
drop - outs would be required. Design information for guard-time adjustment is shown in Fig.7.
VDD
C
St/GT
R1
R2
ESt
tGTP=(Rp C)ln( ^VDD )
VDD-VTST
tGTA=(R1 C)ln( ^VDD )
VTST
Rp=
R1R2
R1+R2
a) Decreasing tGTP (tGTP < tGTA)
VDD
C
St/GT
R1
R2
ESt
tGTP=(Rp C)ln( ^VDD )
VDD-VTST
tGTA=(R1 C)ln( ^VDD )
VTST
Rp=
R1R2
R1+R2
b) Decreasing tGTP (tGTP > tGTA)
Figure 7. Guard time adjustment
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 1.1 2001.04.27
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