EZR32LG230F256 Datasheet, PDF (77/87 Pages) Silicon Laboratories – EZR32LG Wireless MCUs EZR32LG230 Data Sheet

Alternate
Functionality
LOCATION
0
1
2
3
4
U0_TX
PE0
PC14
U1_RX
PC13
PE3
U1_TX
PC12
PE2
US1_CLK
US1_CS
PD2 PF0
PD3 PF1
US1_RX
PD1 PD6
US1_TX
US2_CLK
US2_CS
US2_RX
PD0 PD7
PB5
PB6
PB4
US2_TX
PB3
USRF0_RX
PB8
USRF0_TX
PB7
EZR32LG230 Data Sheet
Pinout and Package
5
Description
UART0 Transmit output. Also used as receive input in
half duplex communication.
UART1 Receive input.
UART1 Transmit output. Also used as receive input in
half duplex communication.
USART1 clock input / output.
USART1 chip select input / output.
USART1 Asynchronous Receive.
USART1 Synchronous mode Master Input / Slave Out-
put (MISO).
USART1 Asynchronous Transmit.Also used as receive
input in half duplex communication.
USART1 Synchronous mode Master Output / Slave In-
put (MOSI).
USART2 clock input / output.
USART2 chip select input / output.
USART2 Asynchronous Receive.
USART2 Synchronous mode Master Input / Slave Out-
put (MISO).
USART2 Asynchronous Transmit.Also used as receive
input in half duplex communication.
USART2 Synchronous mode Master Output / Slave In-
put (MOSI).
USARTRF0 Asynchronous Receive.
USARTRF0 Synchronous mode Master Input / Slave
Output (MISO).
USARTRF0 Asynchronous Transmit.Also used as re-
ceive input in half duplex communication.
USARTRF0 Synchronous mode Master Output / Slave
Input (MOSI).
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