EFM32GG990 Datasheet, PDF (64/81 Pages) Qimonda AG – EFM32GG990 DATASHEET

Alternate
Functionality
0
TIM0_CC0
PA0
TIM0_CC1
PA1
TIM0_CC2
PA2
TIM0_CDTI0
PA3
TIM0_CDTI1
PA4
TIM0_CDTI2
PA5
TIM1_CC0
TIM1_CC1
TIM1_CC2
TIM2_CC0
PA8
TIM2_CC1
PA9
TIM2_CC2
PA10
TIM3_CC0
PE14
TIM3_CC1
PE15
TIM3_CC2
PA15
U0_RX
PF7
U0_TX
PF6
U1_RX
U1_TX
US0_CLK
US0_CS
PE12
PE13
US0_RX
PE11
US0_TX
US1_CLK
US1_CS
US1_RX
PE10
PB7
PB8
PC1
US1_TX
PC0
US2_CLK
PC4
US2_CS
PC5
US2_RX
PC3
US2_TX
PC2
...the world's most energy friendly microcontrollers
1
PA0
PA1
PA2
PE10
PE11
PE12
PA12
PA13
PA14
PE0
PE1
PE2
PE1
PE0
PF11
PF10
PE5
PE4
LOCATION
2
3
4
PF6 PD1 PA0
PF7 PD2 PC0
PF8 PD3 PC1
PC2
PC3
PF5
PC4
PB0 PB7 PD6
PB1 PB8 PD7
PB2 PB11
PC8
PC9
PC10
PA4
PA3
PB10 PE3
PB9 PE2
PC9
PB13
PC8
PB14
5
PF0
PF1
PF2
PF5
PB13
PB14
PE6
PC10 PE12 PB8
PC1
PE7
PC11 PE13 PB7
PC0
PD2
PF0
PD3
PF1
PD1
PD6
PD0
PD7
PB5
PB6
PB4
PB3
6
Description
Timer 0 Capture Compare input / output channel 0.
Timer 0 Capture Compare input / output channel 1.
Timer 0 Capture Compare input / output channel 2.
Timer 0 Complimentary Deat Time Insertion channel 0.
Timer 0 Complimentary Deat Time Insertion channel 1.
Timer 0 Complimentary Deat Time Insertion channel 2.
Timer 1 Capture Compare input / output channel 0.
Timer 1 Capture Compare input / output channel 1.
Timer 1 Capture Compare input / output channel 2.
Timer 2 Capture Compare input / output channel 0.
Timer 2 Capture Compare input / output channel 1.
Timer 2 Capture Compare input / output channel 2.
Timer 3 Capture Compare input / output channel 0.
Timer 3 Capture Compare input / output channel 1.
Timer 3 Capture Compare input / output channel 2.
UART0 Receive input.
UART0 Transmit output. Also used as receive input in half
duplex communication.
UART1 Receive input.
UART1 Transmit output. Also used as receive input in half
duplex communication.
USART0 clock input / output.
USART0 chip select input / output.
USART0 Asynchronous Receive.
USART0 Synchronous mode Master Input / Slave Output
(MISO).
USART0 Asynchronous Transmit.Also used as receive in-
put in half duplex communication.
USART0 Synchronous mode Master Output / Slave Input
(MOSI).
USART1 clock input / output.
USART1 chip select input / output.
USART1 Asynchronous Receive.
USART1 Synchronous mode Master Input / Slave Output
(MISO).
USART1 Asynchronous Transmit.Also used as receive in-
put in half duplex communication.
USART1 Synchronous mode Master Output / Slave Input
(MOSI).
USART2 clock input / output.
USART2 chip select input / output.
USART2 Asynchronous Receive.
USART2 Synchronous mode Master Input / Slave Output
(MISO).
USART2 Asynchronous Transmit.Also used as receive in-
put in half duplex communication.
2014-05-23 - EFM32GG990FXX - d0046_Rev1.30
64
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