EFM32G890 Datasheet, PDF (57/74 Pages) Silicon Laboratories – Wake-up Interrupt Controller

...the world's most energy friendly microcontrollers
Alternate
Functionality
TIM1_CC0
TIM1_CC1
TIM1_CC2
TIM2_CC0
TIM2_CC1
TIM2_CC2
U0_RX
U0_TX
US0_CLK
US0_CS
US0_RX
US0_TX
US1_CLK
US1_CS
US1_RX
US1_TX
US2_CLK
US2_CS
US2_RX
US2_TX
0
PC13
PC14
PC15
PA8
PA9
PA10
PF7
PF6
PE12
PE13
PE11
PE10
PB7
PB8
PC1
PC0
PC4
PC5
PC3
PC2
LOCATION
1
2
PE10
PB0
PE11
PB1
PE12
PB2
PA12
PC8
PA13
PC9
PA14
PC10
PE1
PA4
PE0
PA3
PE5
PC9
PE4
PC8
PE6
PC10
PE7
PC11
PD2
PD3
PD1
PD0
PB5
PB6
PB4
PB3
3
PC15
PC14
Description
Timer 1 Capture Compare input / output channel 0.
Timer 1 Capture Compare input / output channel 1.
Timer 1 Capture Compare input / output channel 2.
Timer 2 Capture Compare input / output channel 0.
Timer 2 Capture Compare input / output channel 1.
Timer 2 Capture Compare input / output channel 2.
UART0 Receive input.
UART0 Transmit output. Also used as receive input in half duplex communi-
cation.
USART0 clock input / output.
USART0 chip select input / output.
USART0 Asynchronous Receive.
USART0 Synchronous mode Master Input / Slave Output (MISO).
USART0 Asynchronous Transmit.Also used as receive input in half duplex
communication.
USART0 Synchronous mode Master Output / Slave Input (MOSI).
USART1 clock input / output.
USART1 chip select input / output.
USART1 Asynchronous Receive.
USART1 Synchronous mode Master Input / Slave Output (MISO).
USART1 Asynchronous Transmit.Also used as receive input in half duplex
communication.
USART1 Synchronous mode Master Output / Slave Input (MOSI).
USART2 clock input / output.
USART2 chip select input / output.
USART2 Asynchronous Receive.
USART2 Synchronous mode Master Input / Slave Output (MISO).
USART2 Asynchronous Transmit.Also used as receive input in half duplex
communication.
USART2 Synchronous mode Master Output / Slave Input (MOSI).
4.3 GPIO Pinout Overview
The specific GPIO pins available in EFM32G890 is shown in Table 4.3 (p. 57) . Each GPIO port is
organized as 16-bit ports indicated by letters A through F, and the individual pin on this port is indicated
by a number from 15 down to 0.
Table 4.3. GPIO Pinout
Port
Port A
Port B
Port C
Port D
Port E
Port F
Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
0
PA15 PA14 PA13 PA12 PA11 PA10 PA9 PA8 PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0
PB15 PB14 PB13 PB12 PB11 PB10 PB9 PB8 PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0
PC15 PC14 PC13 PC12 PC11 PC10 PC9 PC8 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
PD15 PD14 PD13 PD12 PD11 PD10 PD9 PD8 PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
PE15 PE14 PE13 PE12 PE11 PE10 PE9 PE8 PE7 PE6 PE5 PE4 PE3 PE2 PE1 PE0
-
-
-
-
-
-
PF9 PF8 PF7 PF6 PF5 PF4 PF3 PF2 PF1 PF0
2015-05-22 - EFM32G890FXX - d0010_Rev1.90
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