EFM32HG210 Datasheet, PDF (53/69 Pages) Silicon Laboratories – Output state retention and wake-up from Shutoff Mode

QFN32 Pin#
and Name
Preliminary
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Pin Alternate Functionality / Description
Pin Name
Analog
Timers
Communication
Other
TIM0_CC1 #0/1
PRS_CH1 #0
3
PA2
TIM0_CC2 #0/1
CMU_CLK0 #0
4
IOVDD_0
Digital IO power supply 0.
5
PC0
ACMP0_CH0
TIM0_CC1 #4
PCNT0_S0IN #2
US0_TX #5/6
US1_TX #0
US1_CS #5
I2C0_SDA #4
PRS_CH2 #0
6
PC1
ACMP0_CH1
TIM0_CC2 #4
PCNT0_S1IN #2
US0_RX #5/6
US1_TX #5
US1_RX #0
I2C0_SCL #4
PRS_CH3 #0
7
PB7
LFXTAL_P
TIM1_CC0 #3
US0_TX #4
US1_CLK #0
8
PB8
LFXTAL_N
TIM1_CC1 #3
US0_RX #4
US1_CS #0
Reset input, active low.
9
RESETn
To apply an external reset source to this pin, it is required to only drive this pin low during reset, and let the internal pull-up
ensure that reset is released.
10
PB11
IDAC0_OUT
TIM1_CC2 #3
PCNT0_S1IN #4
US1_CLK #4
CMU_CLK1 #3
ACMP0_O #3
11
AVDD_2
Analog power supply 2.
12
PB13
HFXTAL_P
US0_CLK #4/5
LEU0_TX #1
13
PB14
HFXTAL_N
US0_CS #4/5
LEU0_RX #1
14
IOVDD_3
Digital IO power supply 3.
15
AVDD_0
Analog power supply 0.
16
PD4
ADC0_CH4
LEU0_TX #0
17
PD5
ADC0_CH5
LEU0_RX #0
18
PD6
ADC0_CH6
TIM1_CC0 #4
PCNT0_S0IN #3
US1_RX #2/3
I2C0_SDA #1
ACMP0_O #2
19
PD7
ADC0_CH7
TIM1_CC1 #4
PCNT0_S1IN #3
US1_TX #2/3
I2C0_SCL #1
CMU_CLK0 #2
20
VDD_DREG
Power supply for on-chip voltage regulator.
21
DECOUPLE
Decouple output for on-chip voltage regulator. An external capacitance of size C_DECOUPLE is required at this pin.
22
PC13
TIM0_CDTI0 #1/6
TIM1_CC0 #0
TIM1_CC2 #4
PCNT0_S0IN #0
23
PC14
TIM0_CDTI1 #1/6
TIM1_CC1 #0
PCNT0_S1IN #0
US0_CS #3
US1_CS #3/4
LEU0_TX #5
PRS_CH0 #2
24
PC15
TIM0_CDTI2 #1/6
TIM1_CC2 #0
US0_CLK #3
US1_CLK #3
LEU0_RX #5
PRS_CH1 #2
25
PF0
TIM0_CC0 #5
US1_CLK #2
LEU0_TX #3
I2C0_SDA #5
DBG_SWCLK #0
BOOT_TX
26
PF1
TIM0_CC1 #5
US1_CS #2
LEU0_RX #3
I2C0_SCL #5
DBG_SWDIO #0
GPIO_EM4WU3
BOOT_RX
27
PF2
TIM0_CC2 #5/6
TIM2_CC0 #3
US1_TX #4
LEU0_TX #4
CMU_CLK0 #3
PRS_CH0 #3
GPIO_EM4WU4
2015-05-06 - EFM32HG210FXX - _Rev0.91
53
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