SI4030 Datasheet, PDF (50/58 Pages) Silicon Laboratories – Remote control

Si4030/31/32-B1
11. Register Table and Descriptions
Table 15. Register Descriptions
Add R/W
Function/Desc
01 R
Device Version
02 R
Device Status
03 R
Interrupt Status 1
04 R
Interrupt Status 2
05 R/W
Interrupt Enable 1
06 R/W
Interrupt Enable 2
07 R/W Operating & Function Control 1
08 R/W Operating & Function Control 2
09 R/W
Crystal Oscillator Load
Capacitance
0A R/W Microcontroller Output Clock
0B R/W
GPIO0 Configuration
0C R/W
GPIO1 Configuration
0D R/W
GPIO2 Configuration
0E R/W
I/O Port Configuration
0F R/W
ADC Configuration
10 R/W ADC Sensor Amplifier Offset
11 R
ADC Value
12 R/W Temperature Sensor Control
13 R/W Temperature Value Offset
14 R/W
Wake-Up Timer Period 1
15 R/W
Wake-Up Timer Period 2
16 R/W
Wake-Up Timer Period 3
17 R
Wake-Up Timer Value 1
18 R
Wake-Up Timer Value 2
19
1A R/W Low Battery Detector Threshold
1B R
Battery Voltage Level
1C-2F
30 R/W
Data Access Control
31 R
EzMAC status
32
33 R/W
Header Control 2
34 R/W
Preamble Length
36 R/W
Sync Word 3
37 R/W
Sync Word 2
38 R/W
Sync Word 1
39 R/W
Sync Word 0
3A R/W
Transmit Header 3
3B R/W
Transmit Header 2
3C R/W
Transmit Header 1
3D R/W
Transmit Header 0
3E R/W
Transmit Packet Length
4F R/W
ADC8 Control
60
62 R/W Crystal Oscillator/Control Test
6D R/W
TX Power
6E R/W
TX Data Rate 1
6F R/W
TX Data Rate 0
70 R/W Modulation Mode Control 1
71 R/W Modulation Mode Control 2
72 R/W
Frequency Deviation
73 R/W
Frequency Offset 1
74 R/W
Frequency Offset 2
75 R/W
Frequency Band Select
76 R/W Nominal Carrier Frequency 1
77 R/W Nominal Carrier Frequency 0
79 R/W Frequency Hopping Channel
Select
7A R/W Frequency Hopping Step Size
7C R/W
TX FIFO Control 1
7D R/W
TX FIFO Control 2
7E
7F R/W
FIFO Access
D7
0
ffovfl
ifferr
Reserved
enfferr
Reserved
swres
Reserved
xtalshft
Reserved
gpio0drv[1]
gpio1drv[1]
gpio2drv[1]
Reserved
adcstart/adc-
done
Reserved
adc[7]
tsrange[1]
tvoffs[7]
Reserved
wtm[15]
wtm[7]
wtv[15]
wtv[7]
Reserved
0
Reserved
0
Reserved
prealen[7]
sync[31]
sync[23]
sync[15]
sync[7]
txhd[31]
txhd[23]
txhd[15]
txhd[7]
pklen[7]
Reserved
pwst[2]
papeakval
txdr[15]
txdr[7]
Reserved
trclk[1]
fd[7]
fo[7]
Reserved
Reserved
fc[15]
fc[7]
fhch[7]
fhs[7]
Reserved
Reserved
fifod[7]
D6
0
ffunfl
itxffafull
Reserved
entxffafull
Reserved
enlbd
Reserved
xlc[6]
D5
0
itxffaem
Reserved
entxffaem
Reserved
enwt
Reserved
xlc[5]
Data
D4
vc[4]
Reserved
Reserved
Reserved
Reserved
Reserved
x32ksel
Reserved
xlc[4]
D3
vc[3]
reserved
iext
iwut
enext
enwut
txon
autotx
xlc[3]
D2
vc[2]
reserved
ipksent
ilbd
enpksent
enlbd
Reserved
enldm
xlc[2]
D1
vc[1]
cps[1]
Reserved
ichiprdy
Reserved
enchiprdy
pllon
Reserved
xlc[1]
D0
vc[0]
cps[0]
Reserved
ipor
Reserved
enpor
xton
ffclrtx
xlc[0]
POR
Default
06h
—
—
—
00h
03h
01h
00h
7Fh
Reserved
gpio0drv[0]
gpio1drv[0]
gpio2drv[0]
extitst[2]
adcsel[2]
clkt[1]
pup0
pup1
pup2
extitst[1]
adcsel[1]
clkt[0]
gpio0[4]
gpio1[4]
gpio2[4]
extitst[0]
adcsel[0]
enlfc
mclk[2]
mclk[1]
mclk[0]
06h
gpio0[3]
gpio0[2]
gpio0[1]
gpio0[0]
00h
gpio1[3]
gpio1[2]
gpio1[1]
gpio1[0]
00h
gpio2[3]
gpio2[2]
gpio2[1]
gpio2[0]
00h
itsdo
dio2
dio1
dio0
00h
adcref[1] adcref[0] adcgain[1] adcgain[0] 00h
Reserved Reserved Reserved adcoffs[3] adcoffs[2] adcoffs[1] adcoffs[0] 00h
adc[6]
adc[5]
adc[4]
adc[3]
adc[2]
adc[1]
adc[0]
—
tsrange[0]
entsoffs
entstrim
tstrim[3]
tstrim[2]
tstrim[1]
tstrim[0]
20h
tvoffs[6]
tvoffs[5]
tvoffs[4]
tvoffs[3]
tvoffs[2]
tvoffs[1]
tvoffs[0]
00h
Reserved Reserved
wtr[4]
wtr[3]
wtr[2]
wtr[1]
wtr[0]
03h
wtm[14]
wtm[13]
wtm[12]
wtm[11]
wtm[10]
wtm[9]
wtm[8]
00h
wtm[6]
wtm[5]
wtm[4]
wtm[3]
wtm[2]
wtm[1]
wtm[0]
01h
wtv[14]
wtv[13]
wtv[12]
wtv[11]
wtv[10]
wtv[9]
wtv[8]
—
wtv[6]
wtv[5]
wtv[4]
wtv[3]
wtv[2]
wtv[1]
wtv[0]
—
Reserved
Reserved Reserved
lbdt[4]
lbdt[3]
lbdt[2]
lbdt[1]
lbdt[0]
14h
0
0
vbat[4]
vbat[3]
vbat[2]
vbat[1]
vbat[0]
—
Reserved
lsbfrst
crcdonly
Reserved
enpactx
encrc
crc[1]
crc[0]
8Dh
Reserved Reserved Reserved Reserved Reserved
pktx
pksent
—
Reserved
hdlen[2]
hdlen[1]
hdlen[0]
fixpklen synclen[1] synclen[0] prealen[8] 22h
prealen[6] prealen[5] prealen[4] prealen[3] prealen[2] prealen[1] prealen[0] 08h
sync[30]
sync[29]
sync[28]
sync[27] sync[26] sync[25]
sync[24]
2Dh
sync[22]
sync[21]
sync[20]
sync[19] sync[18] sync[17]
sync[16]
D4h
sync[14]
sync[13]
sync[12]
sync[11] sync[10]
sync[9]
sync[8]
00h
sync[6]
sync[5]
sync[4]
sync[3]
sync[2]
sync[1]
sync[0]
00h
txhd[30]
txhd[29]
txhd[28]
txhd[27]
txhd[26]
txhd[25]
txhd[24]
00h
txhd[22]
txhd[21]
txhd[20]
txhd[19]
txhd[18]
txhd[17]
txhd[16]
00h
txhd[14]
txhd[13]
txhd[12]
txhd[11]
txhd[10]
txhd[9]
txhd[8]
00h
txhd[6]
txhd[5]
txhd[4]
txhd[3]
txhd[2]
txhd[1]
txhd[0]
00h
pklen[6]
pklen[5]
pklen[4]
pklen[3]
pklen[2]
pklen[1]
pklen[0]
00h
Reserved
adc8[5]
adc8[4]
adc8[3]
adc8[2]
adc8[1]
adc8[0]
10h
Reserved
pwst[1]
pwst[0]
clkhyst
enbias2x enamp2x
bufovr
enbuf
24h
papeaken papeaklvl[1] papeaklvl[0] Ina_sw
txpow[2] txpow[1]
txpow[0]
18h
txdr[14]
txdr[13]
txdr[12]
txdr[11]
txdr[10]
txdr[9]
txdr[8]
0Ah
txdr[6]
txdr[5]
txdr[4]
txdr[3]
txdr[2]
txdr[1]
txdr[0]
3Dh
Reserved txdtrtscale enphpwdn manppol enmaninv enmanch
enwhite
0Ch
trclk[0]
dtmod[1]
dtmod[0]
eninv
fd[8]
modtyp[1] modtyp[0] 00h
fd[6]
fd[5]
fd[4]
fd[3]
fd[2]
fd[1]
fd[0]
20h
fo[6]
fo[5]
fo[4]
fo[3]
fo[2]
fo[1]
fo[0]
00h
Reserved Reserved Reserved Reserved Reserved
fo[9]
fo[8]
00h
sbsel
hbsel
fb[4]
fb[3]
fb[2]
fb[1]
fb[0]
75h
fc[14]
fc[13]
fc[12]
fc[11]
fc[10]
fc[9]
fc[8]
BBh
fc[6]
fc[5]
fc[4]
fc[3]
fc[2]
fc[1]
fc[0]
80h
fhch[6]
fhch[5]
fhch[4]
fhch[3]
fhch[2]
fhch[1]
fhch[0]
00h
fhs[6]
fhs[5]
fhs[4]
fhs[3]
fhs[2]
fhs[1]
fhs[0]
00h
Reserved
txafthr[5]
txafthr[4]
txafthr[3] txafthr[2] txafthr[1] txafthr[0]
37h
Reserved txaethr[5] txaethr[4] txaethr[3] txaethr[2] txaethr[1] txaethr[0] 04h
Reserved
fifod[6]
fifod[5]
fifod[4]
fifod[3]
fifod[2]
fifod[1]
fifod[0]
—
Note: Detailed register descriptions are available in “AN466: Si4030/31/32 Register Descriptions.”
50
Preliminary Rev. 0.1