SI52111-B3 Datasheet, PDF (5/20 Pages) Silicon Laboratories – PCI-EXPRESS GEN 2 SINGLE OUTPUT CLOCK GENERATOR

Si52111-B3/B4
Table 3. AC Electrical Specifications
Parameter
Symbol
Test Condition
Crystal
Long-term Accuracy
Clock Input
CLKIN Duty Cycle
CLKIN Rise and Fall Times
CLKIN Cycle-to-Cycle Jitter
CLKIN Long Term Jitter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
DIFF Clocks
Duty Cycle
Skew
Output Frequency
Frequency Accuracy
Slew Rate
L_ACC
Measured at V_DD/2 differential
T_DC
T_R/T_F
T_CCJ
T_LTJ
V_IH
V_IL
I_IH
I_IL
Measured at V_DD/2
Measured between 0.2 V_DD and
0.8 V_DD
Measured at V_DD/2
Measured at V_DD/2
XIN/CLKIN pin
XIN/CLKIN pin
XIN/CLKIN pin, VIN = V_DD
XIN/CLKIN pin, 0 < VIN <0.8
T_DC
T_SKEW
F_OUT
F_ACC
t_r/f2
Measured at 0 V differential
Measured at 0 V differential
VDD = 3.3 V
All output clocks
Measured differentially from
±150 mV
Cycle-to-Cycle Jitter
PCIe Gen 1 Pk-Pk Jitter
PCIe Gen 2 Phase Jitter
T_CCJ
Pk-Pk_GEN1
RMS_GEN2
Measured at 0 V differential
PCIe Gen 1
10 kHz < F < 1.5 MHz
1.5 MHz < F < Nyquist
Crossing Point Voltage at 0.7 V
Swing
Voltage High
Voltage Low
Spread Range
Modulation Frequency
V_OX
V_HIGH
V_LOW
S_RNG
F_MOD
Down Spread, -B4 only
-B4 only
Enable/Disable and Set-up
Clock Stabilization from
Power-up
T_STABLE
Stopclock Set-up Time
T_SS
Note: Visit www.pcisig.com for complete PCIe specifications.
Min
—
45
0.5
—
—
2
—
—
–35
45
—
—
—
0.6
—
—
—
—
300
—
–0.3
—
30
—
10.0
Typ Max Unit
—
250 ppm
—
55
%
—
4.0 V/ns
—
250
ps
—
350
ps
— V_DD+0.3 V
—
0.8
V
—
35
uA
—
—
uA
—
—
100
—
—
28
24
1.35
1.4
—
—
—
–0.5
31.5
55
%
60
ps
—
MHz
100 ppm
4.0 V/ns
70
ps
86
ps
3.0
ps
3.1
ps
550
mV
1.15
V
—
V
—%
33 kHz
—
3
ms
—
—
ns
Rev 1.1
5