EFM32TG222 Datasheet, PDF (47/66 Pages) Silicon Laboratories – Configurable peripheral I/O locations

QFP48 Pin#
and Name
...the world's most energy friendly microcontrollers
Pin Alternate Functionality / Description
Pin Name
Analog
Timers
Communication
Other
31
PC9
32
PC10
33
PC11
34
PC13
35
PC14
36
PC15
37
PF0
ACMP1_CH1
ACMP1_CH2
ACMP1_CH3
ACMP1_CH5
DAC0_OUT1ALT #1/
OPAMP_OUT1ALT
ACMP1_CH6
DAC0_OUT1ALT #2/
OPAMP_OUT1ALT
ACMP1_CH7
DAC0_OUT1ALT #3/
OPAMP_OUT1ALT
38
PF1
39
PF2
40
PF3
41
PF4
42
PF5
43
IOVDD_5
Digital IO power supply 5.
44
VSS
Ground.
45
PE10
46
PE11
47
PE12
48
PE13
TIM1_CC0 #0
TIM1_CC2 #4
PCNT0_S0IN #0
TIM1_CC1 #0
PCNT0_S1IN #0
TIM1_CC2 #0
TIM0_CC0 #5
LETIM0_OUT0 #2
TIM0_CC1 #5
LETIM0_OUT1 #2
TIM0_CC2 #5
TIM1_CC0 #1
TIM1_CC1 #1
TIM1_CC2 #1
US0_CLK #2
US0_RX #2
US0_TX #2
US0_CS #3
US0_CLK #3
US1_CLK #2
LEU0_TX #3
I2C0_SDA #5
US1_CS #2
LEU0_RX #3
I2C0_SCL #5
LEU0_TX #4
LES_CH9 #0
GPIO_EM4WU2
LES_CH10 #0
LES_CH11 #0
LES_CH13 #0
LES_CH14 #0
LES_CH15 #0
DBG_SWO #1
DBG_SWCLK #0/1
DBG_SWDIO #0/1
GPIO_EM4WU3
ACMP1_O #0
DBG_SWO #0
GPIO_EM4WU4
PRS_CH0 #1
PRS_CH1 #1
PRS_CH2 #1
US0_TX #0
US0_RX #0
US0_RX #3
US0_CLK #0
I2C0_SDA #6
US0_TX #3
US0_CS #0
I2C0_SCL #6
BOOT_TX
LES_ALTEX5 #0
BOOT_RX
CMU_CLK1 #2
LES_ALTEX6 #0
LES_ALTEX7 #0
ACMP0_O #0
GPIO_EM4WU5
4.2 Alternate Functionality Pinout
A wide selection of alternate functionality is available for multiplexing to various pins. This is shown in
Table 4.2 (p. 48) . The table shows the name of the alternate functionality in the first column, followed
by columns showing the possible LOCATION bitfield settings.
Note
Some functionality, such as analog interfaces, do not have alternate settings or a LOCA-
TION bitfield. In these cases, the pinout is shown in the column corresponding to LOCA-
TION 0.
2015-03-06 - EFM32TG222FXX - d0051_Rev1.40
47
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