EFM32GG330 Datasheet, PDF (46/71 Pages) List of Unclassifed Manufacturers – EFM32GG330 DATASHEET

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Table 3.23. SPI Master Timing
Symbol
Parameter
Condition
Min
Typ
t_SCLK ^{1 2}
SCLK period
t_{CS_MO} ^{1 2}
t_{SCLK_MO} ^{1 2}
CS to MOSI
SCLK to MOSI
t_{SU_MI} ^{1 2}
MISO setup time
IOVDD = 1.98 V
IOVDD = 3.0 V
2 * t_HFPER-
CLK
-2.00
-4.00
36.00
29.00
t_{H_MI} ^{1 2}
MISO hold time
-4.00
1_{Applies for both CLKPHA = 0 and CLKPHA = 1 (figure only shows CLKPHA = 0)}
2_{Measurement done at 10% and 90% of VDD (figure shows 50% of VDD)}
Figure 3.29. SPI Slave Timing
Max
Unit
ns
1.00 ns
3.00 ns
ns
ns
ns
CS
SCLK
CLKPOL = 0
SCLK
CLKPOL = 1
MOSI
MISO
t _{CS_ACT_MI}
t _{SU_MO}
t _{H_MO}
t _{SCLK_HI}
t _{SCLK_LO}
t _SCLK
t _{SCLK_MI}
t _{CS_DIS_MI}
Table 3.24. SPI Slave Timing
Symbol
Parameter
Min
Typ
Max
Unit
t_{SCLK_sl} ^{1 2}
SCKL period
2 * t_HFPER-
CLK
t_{SCLK_hi} ^{1 2}
SCLK high period
3 * t_HFPER-
CLK
t_{SCLK_lo} ^{1 2}
SCLK low period
3 * t_HFPER-
CLK
t_{CS_ACT_MI} ^{1 2}
CS active to MISO
4.00
t_{CS_DIS_MI} ^{1 2}
CS disable to MISO
4.00
t_{SU_MO} ^{1 2}
MOSI setup time
4.00
t_{H_MO} ^{1 2}
MOSI hold time
2 + 2* t_HF-
PERCLK
t_{SCLK_MI} ^{1 2}
SCLK to MISO
9 + t_HFPER-
CLK
1_{Applies for both CLKPHA = 0 and CLKPHA = 1 (figure only shows CLKPHA = 0)}
2_{Measurement done at 10% and 90% of VDD (figure shows 50% of VDD)}
ns
ns
ns
30.00 ns
30.00 ns
ns
ns
36 + 2*t_HF- ns
PERCLK
3.17 USB
The USB hardware in the EFM32GG330 passes all tests for USB 2.0 Full Speed certification. See the
test-report distributed with application note "AN0046 - USB Hardware Design Guide".
2014-05-23 - EFM32GG330FXX - d0038_Rev1.30
46
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