EFR32FG1 Datasheet, PDF (45/101 Pages) Silicon Laboratories – Electronic Shelf Labels

I2C Fast-mode (Fm)
EFR32FG1 Flex Gecko Proprietary Protocol SoCFamily Data Sheet
Electrical Specifications
Table 4.31. I2C Fast-mode (Fm)¹
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
SCL clock frequency²
f_SCL
0
—
400
kHz
SCL clock low time
t_LOW
1.3
—
—
μs
SCL clock high time
t_HIGH
0.6
—
—
μs
SDA set-up time
t_SU,DAT
100
—
—
ns
SDA hold time³
t_HD,DAT
100
—
900
ns
Repeated START condition t_SU,STA
set-up time
0.6
—
—
μs
(Repeated) START condition t_HD,STA
hold time
0.6
—
—
μs
STOP condition set-up time t_SU,STO
0.6
—
—
μs
Bus free time between a
t_BUF
STOP and START condition
1.3
—
—
μs
Note:
1. For CLHR set to 1 in the I2Cn_CTRL register
2. For the minimum HFPERCLK frequency required in Fast-mode, refer to the I2C chapter in the reference manual
3. The maximum SDA hold time (t_HD,DAT) needs to be met only when the device does not stretch the low time of SCL (t_LOW)
I2C Fast-mode Plus (Fm+)
Table 4.32. I2C Fast-mode Plus (Fm+)¹
Parameter
Symbol
Test Condition
Min
Typ
Max
SCL clock frequency²
f_SCL
0
—
1000
SCL clock low time
t_LOW
0.5
—
—
SCL clock high time
t_HIGH
0.26
—
—
SDA set-up time
t_SU,DAT
50
—
—
SDA hold time
t_HD,DAT
100
—
—
Repeated START condition t_SU,STA
set-up time
0.26
—
—
(Repeated) START condition t_HD,STA
hold time
0.26
—
—
STOP condition set-up time t_SU,STO
0.26
—
—
Bus free time between a
t_BUF
STOP and START condition
0.5
—
—
Note:
1. For CLHR set to 0 or 1 in the I2Cn_CTRL register
2. For the minimum HFPERCLK frequency required in Fast-mode Plus, refer to the I2C chapter in the reference manual
Unit
kHz
μs
μs
ns
ns
μs
μs
μs
μs
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