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EFM32LG880 Datasheet, PDF (42/85 Pages) Silicon Laboratories – Output state retention and wake-up from Shutoff Mode
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Figure 3.31. ADC Temperature sensor readout
2600
2500
Vdd= 2.0
Vdd= 3.0
Vdd= 3.8
2400
2300
2200
2100
–4 0
–25 –15 –5 5 15 25 35 45 55 65 75 85
Tem perature [°C]
3.11 Digital Analog Converter (DAC)
Table 3.16. DAC
Symbol
VDACOUT
VDACCM
IDAC
SRDAC
Parameter
Condition
Output voltage
range
VDD voltage reference, single
ended
VDD voltage reference, differ-
ential
Output common
mode voltage range
Active current in-
cluding references
for 2 channels
500 kSamples/s, 12 bit
100 kSamples/s, 12 bit
1 kSamples/s 12 bit NORMAL
Sample rate
Min
Typ
0
-VDD
0
Continuous Mode
fDAC
DAC clock frequen-
cy
Sample/Hold Mode
Sample/Off Mode
CYCDACCONV Clock cyckles per
conversion
tDACCONV
Conversion time
2
tDACSETTLE
Settling time
SNRDAC
Signal to Noise Ra-
tio (SNR)
500 kSamples/s, 12 bit, sin-
gle ended, internal 1.25V refer-
ence
500 kSamples/s, 12 bit, single
ended, internal 2.5V reference
500 kSamples/s, 12 bit, differ-
ential, internal 1.25V reference
Max
Unit
VDD V
VDD V
4001
2001
171
2
VDD V
µA
µA
µA
500 ksam-
ples/s
1000 kHz
250 kHz
250 kHz
µs
5
µs
58
dB
59
dB
58
dB
2014-06-13 - EFM32LG880FXX - d0117_Rev1.30
42
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