EM359X Datasheet, PDF (41/59 Pages) Silicon Laboratories – High-Performance, Integrated ZigBee/802.15.4 System-on-Chip Family

EM359x
Table 6.1. EM359x Pin Descriptions (Continued)
Pin #
Signal
Direction
Description
23
PB3
I/O Digital I/O
TIM2C3
O
Timer 2 channel 3 output
(see also Pin 26)
Enable remap with TIM2_OR[6]
Enable timer output in TIM2_CCER
Select alternate output function with GPIO_PBCFGL[15:12]
TIM2C3
I
Timer 2 channel 3 input
(see also Pin 26)
Enable remap with TIM2_OR[6]
SC1nCTS
SC1SCLK
SC1SCLK
24
PB4
I
UART CTS handshake of Serial Controller 1
Enable with SC1_UARTCFG[5]
Select UART with SC1_MODE
O
SPI master clock of Serial Controller 1
Either disable timer output in TIM2_CCER, 
or disable remap with TIM2_OR[6]
Enable master with SC1_SPICFG[4]
Select SPI with SC1_MODE
Select alternate output function with GPIO_PBCFGL[15:12]
I
SPI slave clock of Serial Controller 1
Enable slave with SC1_SPICFG[4]
Select SPI with SC1_MODE
I/O Digital I/O
TIM2C4
O
Timer 2 channel 4 output
(see also Pin 28)
Enable remap with TIM2_OR[7]
Enable timer output in TIM2_CCER
Select alternate output function with GPIO_PBCFGH[3:0]
TIM2C4
I
Timer 2 channel 4 input
(see also Pin 28)
Enable remap with TIM2_OR[7]
SC1nRTS
SC1nSSEL
O
UART RTS handshake of Serial Controller 1
Either disable timer output in TIM2_CCER, 
or disable remap with TIM2_OR[7]
Enable with SC1_UARTCFG[5]
Select UART with SC1_MODE
Select alternate output function with GPIO_PBCFGH[3:0]
I
SPI slave select of Serial Controller 1
Enable slave with SC1_SPICFG[4]
Select SPI with SC1_MODE
Note:
1. IRQC and IRQD external interrupts can be mapped to any digital I/O pin using the GPIO_IRQCSEL and
GPIO_IRQDSEL registers.
Rev 1.0
41