EFM32TG842 Datasheet, PDF (32/69 Pages) Silicon Laboratories – Configurable peripheral I/O locations

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Figure 3.20. ADC Integral Linearity Error vs Code, Vdd = 3V, Temp = 25°C
1.25V Reference
2.5V Reference
2XVDDVSS Reference
5VDIFF Reference
VDD Reference
2015-03-06 - EFM32TG842FXX - d0072_Rev1.40
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