EFM32LG360 Datasheet, PDF (3/75 Pages) Silicon Laboratories – Output state retention and wake-up from Shutoff Mode

2 System Summary
...the world's most energy friendly microcontrollers
2.1 System Introduction
The EFM32 MCUs are the world’s most energy friendly microcontrollers. With a unique combination of
the powerful 32-bit ARM Cortex-M3, innovative low energy techniques, short wake-up time from ener-
gy saving modes, and a wide selection of peripherals, the EFM32LG microcontroller is well suited for
any battery operated application as well as other systems requiring high performance and low-energy
consumption. This section gives a short introduction to each of the modules in general terms and also
shows a summary of the configuration for the EFM32LG360 devices. For a complete feature set and in-
depth information on the modules, the reader is referred to the EFM32LG Reference Manual.
A block diagram of the EFM32LG360 is shown in Figure 2.1 (p. 3) .
Figure 2.1. Block Diagram
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Core and Mem ory
ARM Cortex ™ M3 processor
Flash
Pr o g r am
Mem o r y
RAM
Mem o r y
Deb u g
In t er f ace
w/ ETM
Mem o r y
Pr o t ect i o n
Unit
DMA
Co n t r o l l er
Clock Managem ent
Aux High Freq.
RC
Osci l l at o r
High Freq.
RC
Osci l l at o r
High Freq.
Cr yst al
Osci l l at o r
Low Freq.
RC
Osci l l at o r
Low Freq.
Cr yst al
Osci l l at o r
Ultra Low Freq.
RC
Osci l l at o r
Energy Managem ent
Vo l t ag e
Reg u l at o r
Vo l t ag e
Com parator
Brown- out
Det ect o r
Back- up
Power
Dom ain
Power- on
Reset
Serial Interfaces
USART
UART
Low
En er g y
I²C
UART™
USB
I/ O Ports
32- bit bus
Peripheral Reflex System
Tim ers and Triggers
Ti m er /
Co u n t er
LESENSE
Ex ternal
In t er r u p t s
Gen er al
Pu r p o se
I/ O
Pin
Reset
Pin
Wak eu p
Low Energy Real Tim e
Ti m er
Co u n t er
Pulse
Co u n t er
Wat ch d o g
Ti m er
Back- up
RTC
Analog Interfaces
ADC
DAC
Op er at i o n al
Am p l i f i er
Analog
Com parator
Secu r i t y
Har d w ar e
AES
2.1.1 ARM Cortex-M3 Core
The ARM Cortex-M3 includes a 32-bit RISC processor which can achieve as much as 1.25 Dhrystone
MIPS/MHz. A Memory Protection Unit with support for up to 8 memory segments is included, as well
as a Wake-up Interrupt Controller handling interrupts triggered while the CPU is asleep. The EFM32
implementation of the Cortex-M3 is described in detail in EFM32 Cortex-M3 Reference Manual.
2.1.2 Debug Interface (DBG)
This device includes hardware debug support through a 2-pin serial-wire debug interface and an Embed-
ded Trace Module (ETM) for data/instruction tracing. In addition there is also a 1-wire Serial Wire Viewer
pin which can be used to output profiling information, data trace and software-generated messages.
2014-10-15 - EFM32LG360FXX - d0286_Rev1.00
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