AN725 Datasheet, PDF (22/28 Pages) Silicon Laboratories – ADVANCED LOW POWER TECHNIQUES FOR SiM3L1XX DEVICES

AN725
COM0
Phase
01234567
3V
2V
2V
2V
1V
1V
1V
0V
COM1
3V
2V
2V
2V
1V
1V
1V
0V
COM2
3V
2V
2V
2V
1V
1V
1V
0V
COM3
3V
2V
2V
2V
1V
1V
1V
0V
Figure 9. LCD Common Waveforms
For a 4 MUX LCD architecture, Figure 9 demonstrates that three of the four commons are at the same potential in
every phase. This potential is 2 V for the even phases and 1 V for the odd phases. Instead of the traditional
segment switching method, the SiM3L1xx devices reset the segments to 2 V for even phases and 1 V for odd
phases before switching to the next segment potential to reduce the overall load current of the LCD.
The waveforms shown in Figure 10 show the SiM3L1xx segment resetting behavior in the common and segment
waveforms. The areas marked in red are the reset events to the 1 V or 2 V potential, depending on the phase.
Overall, this reset waveform scheme reduces the current load of an LCD by ~40%, regardless of the number of
segments in the display. Power-conscious applications using an LCD should enable this feature (RPHEN = 1) and
set the number of RTC0 clocks to reset the segment (RPHMD field) using the LCD0 SEGCONTROL register.
Generally, a RPHMD value of 2 provides significant power savings without introducing visual artifacts. However, it
is recommended to try a range of values to find the best value for a given LCD.
COM0
Phase
0
1
2
3
4
5
6
7
2V
1V
0V
3V
2V
2V
1V
1V
SEG0
3V
2V
2V
2V
1V
1V
1V
0V
Figure 10. SiM3L1xx LCD Waveforms with Segment Resetting
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Rev. 0.1