SI53154-EVB Datasheet, PDF (2/6 Pages) Silicon Laboratories – Power consumption test

Si53154-EVB
1. Front Panel
Differential Buffer Input
for on Si53154-EVB only
3.3V Power Supply Connector
GND Connector
VDD Connectors
OE1 hardware input
control for DIFF1 output
No Connect
OE2 hardware input
control for DIFF2 output
OE0 hardware input
control for DIFF0 output
Si53154 device mount
I2C connect -For I2C read and
write. In sequence SData, Gnd,
SCLK from left to right.
OE_DIFF3 hardware input
control for DIFF3 output
DIFF3 Differential output
DIFF2 Differential output
DIFF1 Differential output
DIFF0 Differential output
Jumper Label
OE0
OE1
OE2
OE3
SDATA
SCLK
Figure 1. Evaluation Module Front Panel
Table 1. Input Jumper Settings
Type
Description
I _{OE0, 3.3 V Input for Enabling DIFF0 Clock Output.}
1 = DIFF0 enabled, 0 = DIFF0 disabled.
I _{OE1, 3.3 V Input for Enabling DIFF1 Clock Output.}
1 = DIFF1 enabled, 0 = DIFF1 disabled.
I _{OE2, 3.3 V Input for Enabling DIFF2 Clock Output.}
1 = DIFF2 enabled, 0 = DIFF2 disabled.
I _{OE3, 3.3 V Input for Enabling DIFF3 Clock Output.}
1 = DIFF3 enabled, 0 = DIFF3 disabled.
I/O _{SMBus-Compatible SDATA.}
I SMBus-Compatible SCLOCK.
2
Rev. 0.1