SI3452 Datasheet, PDF (12/36 Pages) Silicon Laboratories – QUAD HIGH-VOLTAGE PORT CONTROLLER FOR POE AND POE+ PSES

Si3452/3
4. Functional Description
Integrating four independent, high-voltage PSE port interfaces, the Si3452/3 high-voltage port controller enables
an extremely flexible solution for virtually any PoE or PoE+ PSE application. The Si3452/3 provides all of the high-
voltage Power over Ethernet PSE functions.
Each port of the Si3452/3 integrates all high-voltage PSE controller functions needed for a quad-port PoE design,
including the power MOSFET, efficient current-sensing circuitry, transient voltage surge suppressor, and multiple
detect and disconnect circuits. When the dc disconnect or dV/dt disconnect sensing methods are selected, the
external BOM is typically only a single filter capacitor on each high-voltage port.
When a PD device has been properly detected and classified, the port is powered by a –54 V nominal supply with
continuous monitoring of voltage and current for feedback to the host system.
In addition to the required IEEE features, the Si3452/3 includes many additional features:
 Per port current / voltage monitoring and measurement
 Support for 1-Event and 2-Event classification algorithms
 Start up in shutdown or auto mode
 Alternative A (typically used for endpoint systems) or Alternative B (typically used for midspan systems)
detection timing
4.1. Detection
The Si3452/3 has per-port signature detection that satisfies the IEEE Std 802.3™-2005 specifications. However, by
utilizing a 3-point voltage-forced detection method, the Si3452/3 yields robust recognition of valid and invalid
powered device (PD) signatures, properly identifying signatures often mischaracterized by other detection
techniques.
3 point
detection
2 event
classification
Port powerup
Figure 4. PSE Sequencing
(3-Point Detection followed by 2-Event Classification and Powerup)
Vport Relative to GND
The detection circuitry performs the function of setting the output voltage on any channel to the proper value for
detection or classification and then measuring the resulting line current.
A typical detection cycle consists of applying 4 V, then 8 V, and back to 4 V, with the current limit set to 3 mA. The
current is measured after an appropriate settling time. For a valid PD, the detection signature must be compliant
with the detection voltage both increasing and decreasing.
12
Rev. 1.0