SI5018-EVB Datasheet, PDF (1/10 Pages) Silicon Laboratories – Simple jumper configuration

Si5018-EVB
EVALUATION BOARD FOR Si5018 SiPHY™ OC-48/STM-16
CLOCK AND DATA RECOVERY IC WITH FEC
Description
Features
The Si5018 evaluation board provides a platform for
testing and characterizing Silicon Laboratories Si5018
OC-48, STM-16, and 2.7 Gbps FEC clock and data
recovery (CDR) device.
All high-speed I/Os are ac coupled to ease interfacing to
industry standard test equipment.
„ Single 2.5 V power supply
„ Differential I/Os ac coupled
„ Simple jumper configuration
Function Block Diagram
Pulse
Generator
Pattern
Generator
Z_C = 50 Ω
Z_C = 50 Ω
Z_C = 50 Ω
Z_C = 50 Ω
+
REFCLK
–
+
CLKOUT
–
Si5018
+
DATAIN
–
+
DATAOUT
–
PW RDN/CAL
LOL
REXT
Jumper
Si5018-EVB
Rev C
Z_C = 50 Ω
Z_C = 50 Ω
Z_C = 50 Ω
Z_C = 50 Ω
Jitter
Analyzer
Scope
Pattern
Analyzer
10 kΩ
Test
Point
Rev. 1.0 12/02
Copyright © 2002 by Silicon Laboratories
Si5018-EVB-10