SI4730-D60-GMR Datasheet, PDF (1/44 Pages) Silicon Laboratories – BROADCAST AM/FM/SW/LW RADIO RECEIVER

Si4730/31/34/35-D60
BROADCAST AM/FM/SW/LW RADIO RECEIVER
Features
 Worldwide FM band support
 Multiplexed stereo audio AUXIN
(64–108 MHz)
ADC with 85 dB dynamic range
 Worldwide AM band support
 Seven selectable AM channel filters
(520–1710 kHz)
 AM/FM/SW/LW digital tuning
 SW band support (Si4734/35)
 EN55020 compliant
(2.3–26.1 MHz)
 No manual alignment necessary
 LW band support (Si4734/35)
 Programmable reference clock
(153–279 kHz)
 Adjustable soft mute control
 Excellent real-world performance _{ RDS/RBDS processor (Si4731/35)}
 Integrated VCO
 Digital audio out
 Advanced AM/FM seek tuning
 2-wire and 3-wire control interface
 Automatic frequency control (AFC) _{ Integrated LDO regulator}
 Automatic gain control (AGC)
 Wide range of ferrite loop sticks and
 Digital FM stereo decoder
air loop antennas supported
 Programmable de-emphasis
 QFN and SSOP packages
 Advanced Audio Processing
RoHS compliant
Applications
 Table and portable radios
 Mini/micro systems
 CD/DVD and Blu-ray players
 Stereo boom boxes
Description
 Modules for consumer electronics
 Clock radios
 Mini HiFi and docking stations
 Entertainment systems
The Si473x-D60 digital CMOS AM/FM radio receiver IC integrates the complete
tuner function from antenna input to digital audio output and includes a stereo
audio AUXIN ADC input for converting analog audio into standard I2S digital
audio, enabling a cost efficient digital audio platform for consumer electronic
applications with high TDMA noise immunity, superior radio performance, and
high fidelity audio power amplification. When enabling the analog inputs in stereo
AUXIN ADC-mode, the Si473x-D60 supports I2S digital audio output only (no
analog output).
Functional Block Diagram
FM / SW
ANT
R IN
LIN
FMI
AM / LW
ANT
AMI
RFGND
2.7~5.5 V (QFN)
2.0~5.5 V (SSOP) _VA
+
GND
LNA
AGC
LNA
AGC
LDO
Mux
Mux
Si473x-D60
RDS
(S i4 7 3 1 /
35)
LOW -IF
D IG ITA L
A U D IO
DOUT
DFS
G P O /D C L K
ADC
DAC
DSP
ADC
DAC
ROUT
LOUT
AFC
CONTROL
IN T E R F A C E
VD
1.62 - 3.6 V
Ordering Information:
See page 33.
Pin Assignments
Si473x-D60 (QFN)
NC 1
FMI 2
RFGND 3
AMI 4
RST 5
6
20 19 18 17 16
15 DOUT/[LIN]
GND
PAD
14 LOUT/[DFS]
13 ROUT/[DOUT]
12 GND
7 8 9 10 11 VA
Si473x-D60(SSOP)
DOUT/[LIN] 1
DFS/[RIN] 2
GPO3/[DCLK] 3
GPO2/[INT] 4
GPO1 5
NC
6
NC 7
FMI
8
RFGND 9
NC 10
NC 11
AMI 12
24 LOUT/[DFS]
23 ROUT/[DOUT]
22 DBYP
21 VA
20 VD
19 RCLK
18 SDIO
17 SCLK
16 SEN
15 RST
14 GND
13 GND
This product, its features, and/or its
architecture is covered by one or more of
the following patents, as well as other
patents, pending and issued, both
foreign and domestic: 7,127,217;
7,272,373; 7,272,375; 7,321,324;
7,355,476; 7,426,376; 7,471,940;
7,339,503; 7,339,504.
Rev. 1.1 11/11
Copyright © 2011 by Silicon Laboratories
Si473x-D60