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SI3402ISO-EVB Datasheet, PDF (1/16 Pages) Silicon Laboratories – ISOLATED EVALUATION BOARD FOR THE Si3402
Si3402 ISO-EVB
ISOLATED EVALUATION BOARD FOR THE Si3402
1. Description
The Si3402 isolated evaluation boards (Si3402 ISO-EVB Rev 1.0) is a reference design for power supplies in
Power over Ethernet (PoE) Powered Device (PD) applications. The Si3402 is described more completely in the
data sheet and application notes. This document describes only the Si3402 ISO-EVB evaluation board. An
evaluation board demonstrating the non-isolated application is described in the Si3402-EVB User’s Guide.
2. Planning for Successful Designs
Silicon Labs strongly recommends the use of the schematic and layout databases provided with the evaluation
boards as the starting point for your design. Use of external components other than those described and
recommended in this document is generally discouraged. Refer to Table 2 on page 10 for more information on
critical component specifications. Careful attention to the recommended layout guidelines is required to enable
robust designs and full specification compliance. To help ensure design success, please submit your schematic
and layout databases to PoEInfo@silabs.com for review and feedback.
3. Si3402 Board Interface
Ethernet data and power are applied to the board through the RJ-45 connector (J1). The board may be powered by
the following:
 Connecting a dc source to 1, 2 and 3, 6 (either polarity)
 Connecting a dc source to 4, 5 and 7, 8 (either polarity)
 Using an 802.3af-compliant PSE, such as Phihong PSA16U-480 (PoE)
The board itself has no Ethernet data transmission functionality. The dc output is at connectors J11(+) and J12(–).
Boards are generally shipped configured to produce +5 V but can be configured for +3.3 V or other output voltages
as shown in Table 2 on page 10. The Si3402 board schematics and layout are shown in Figures 1 through 6. The
Si3402 ISO-EVB is normally populated for 5 V output class 3 signature and without the diode bridge bypass
recommended for higher power levels. Use the ordering option Si3402 ISO-C4-EVB for 5 V output, class 4
signature and diode bridge bypass for higher power levels.
The feedback loop compensation has been optimized for 3.3, 5, 9, and 12 V output as well as with standard and
low ESR capacitors in the output filter section (Table 2 on page 10). The use of low ESR capacitors is
recommended for lower output ripple, improved load transient response and low temperature (below 0 °C)
operation.
Rev. 1.1 6/10
Copyright © 2010 by Silicon Laboratories
Si3402 ISO-EVB