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SI3050 Datasheet, PDF (1/112 Pages) Silicon Laboratories – PCM highway data interface law A-law companding SPI control interface GCl interface
Si3050 +
Si3018/19
GLOBAL VOICE DAA
Features
 PCM highway data interface
 µ-law/A-law companding
 SPI control interface
 GCI interface
 80 dB dynamic range TX/RX
 Line voltage monitor
 Loop current monitor
 +6 dBm or +3.2 dBm TX/RX level
mode
 Parallel handset detection
 3 µA on-hook line monitor current
 Overload detection
 Programmable line interface
AC termination
DC termination
Ring detect threshold
Ringer impedance
 TIP/RING polarity detection
 Integrated codec and 2- to 4-wire
analog hybrid
 Programmable digital hybrid for
near-end echo reduction
 Polarity reversal detection
 Programmable digital gain in 0.1 dB
increments
 Integrated ring detector
 Type I and II caller ID support
 Pulse dialing support
 3.3 V power supply
 Daisy-chaining for up to 16 devices
 Greater than 5000 V isolation
 Patented isolation technology
 Ground start and loop start support
 Available in Pb-free RoHS-compliant
packages
Applications
 DSL IADs
 VoIP gateways
 PBX and IP-PBX systems
 Voice mail systems
Description
The Si3050+Si3018/19 Voice DAA chipset provides a highly-programmable and
globally-compliant foreign exchange office (FXO) analog interface that is ideal for
DSL IADs, PBXs, IP-PBXs, and VoIP gateway products. The solution implements
Silicon Laboratories' patented isolation capacitor technology, which eliminates the
need for costly isolation transformers, relays, or opto-isolators, while providing
superior surge immunity for robust field performance. The Voice DAA is available
in one 20-pin TSSOP (Si3050) and one 16-pin TSSOP/SOIC (Si3018/19) and
requires minimal external components. The Si3050 interfaces directly to standard
telephony PCM interfaces.
Functional Block Diagram
CS
SCLK
SDI
SDO
SDI THRU
PCLK
DTX
DRX
FSYNC
RGDT
RG
TGD
TGDE
RESET
AOUT/INT
Si3050
Control
Data
Interface
Line
Data
Interface
Isolation
Interface
Control
Logic
Si3018/19
Isolation
Interface
Hybrid, AC
and DC
Terminations
Ring Detect
Off-Hook
RX
IB
SC
DCT
VREG
VREG2
DCT2
DCT3
RNG1
RNG2
QB
QE
QE2
Ordering Information
See page 102.
Pin Assignments
Si3050
SDO 1
SDI 2
CS 3
FSYNC 4
PCLK 5
DTX 6
DRX 7
RGDT 8
AOUT/INT 9
RG 10
20 SDITHRU
19 SCLK
18 GND
17 VDD
16 VA
15 C1A
14 C2A
13 RESET
12 TGDE
11 TGD
Si3018/19
QE 1
DCT 2
RX 3
IB 4
C1B 5
C2B 6
VREG 7
RNG1 8
16 DCT2
15 IGND
14 DCT3
13 QB
12 QE2
11 SC
10 VREG2
9 RNG2
US Patent# 5,870,046
US Patent# 6,061,009
Other Patents Pending
Rev. 1.31 5/09
Copyright © 2009 by Silicon Laboratories
Si3050 + Si3018/19