SI21692-D60 Datasheet, PDF (1/2 Pages) Silicon Laboratories – Dual DVB-T2/S2/S2X/T/C/S Digital TV Demodulator

Si21692-D60
Dual DVB-T2/S2/S2X/T/C/S Digital TV Demodulator
Description
The Si21692D integrates two separate high-performance digital
demodulators for the DVB-T2/T/C, DVB-S2/S and DVB-S2X
standards into a single compact package. Leveraging Silicon Labs'
proven digital demodulation architecture, the Si21692D achieves
excellent reception performance for each media while significantly
minimizing front-end design complexity, cost, and power
dissipation. Connecting the Si21692D to both a dual terrestrial/
cable TV tuner, and a dual satellite tuner, results in a
high-performance and cost optimized TV front-end solution.
Silicon Labs’ internally-developed DVB-T2 (including T2-Lite)
demodulators support all modes specified by the DVB-T2 standard
(V1.4.1). Main features of the DVB-T2 mode are, SISO and MISO
support, FEF management, fully autonomous signal acquisition
including automatic L1 signaling parsing support for all pilot
patterns, and DVB-T2/T auto-detection.
The DVB-T and DVB-C, including ITU-T J.83 annex B,
demodulators are enhanced versions of proven and broadly used
Si2164/67/68/69 Silicon Labs devices.
The satellite reception allows demodulating widespread DVB-S,
DIRECTV™ (DSS), DVB-S2, DIRECTV™ (AMC) legacy
standards, and new Part II of DVB-S2 (S2X) satellite broadcast
standard. A zero-IF interface (differential) allows for a seamless
connection to market proven satellite silicon tuners. It also
integrates two DiSEqC™ 2.0 LNB interfaces for satellite dish
control and, for each satellite demodulator, an equalizer to
compensate for echoes in long cable feeds from the LNB to the
satellite tuner RF input.
The Si21692D offers an on-chip blind scanning algorithm for
DVB-S/S2/S2X and DVB-C standards, as well as blind lock
function. The Si21692D embeds two independent programmable
transport stream interfaces which provide a flexible range of output
modes, including a cross-bar functionality, and are fully compatible
with all MPEG decoders or conditional access modules to support
any customer application.
Features
- Pin-to-pin compatible with all dual demodulator family: Si216x2
and Si218x2
- API compatible with all single and all dual demodulators
- DVB-T2 and T2-Lite (ETSI EN 302 755-V1.4.1)
- Bandwidth: 1.7, 5, 6, 7 or 8 MHz
- NorDig Unified 2.5 and D-Book 8 compliant
- DVB-T (ETSI EN 300 744)
- NorDig Unified 2.5, D-Book 8 compliant
- DVB-C (ETSI EN 300 429) / ITU-T J.83 Annex A/B/C
- 1 to 7.2 MSymbol/s, C-Book compliant
- DVB-S2 (ETSI EN 302 307-1 V1.4.1)
- QPSK/8PSK demodulator
- DVB-S2X (ETSI EN302 307-2 V1.1.1)
- QPSK/8PSK, 8/16/32APSK demodulator
- Roll-off factors from 0.05 to 0.35
- Channel bonding for TS transmission supported
- DVB-S (ETSI EN 300 421) and DSS supported
- Dual DiSEqC™ 2.x interface, Unicable support
- 1 to 45 MSps for all satellite standards 
(<40 MSps in 32APSK)
- I²C serial bus interfaces (master and host)
- Upgradeable with firmware patch download via fast SPI or I²C
(broadcast mode supported)
- Dual independent differential IF input for T/C tuners and differ-
ential ZIF I/Q inputs for satellite tuners
- GPIOs and multi-purpose ports (two per demodulator)
- Separate flexible TS interfaces with serial or parallel 
outputs and cross-bar feature
- Fast lock times for all standards
- Only two power supplies: 1.2 and 3.3 V
- 8x8 mm, QFN-68 pin package, Pb-free/RoHS compliant
Applications
- Multi-receiver iDTV: on-board or in a NIM
- Advanced multimedia PVR STBs
- PC-TV accessories
- PVR, DVD, and Blu-Ray disc recorders
Dual Satellite
Tuner
TV Tuner
TV Tuner
MP_A_A
MP_C_A
S_ADC_IP_A
S_ADC_IN_A
S_ADC_QP_A
S_ADC_QN_A
TC_ADC_P_A
TC_ADC_N_A
DiSEqC_OUT_A
DiSEqC_CMD
DiSEqC_IN_A_B
SDA_MAST
SCL_MAST
XO
XTAL_I/CLK_IN
CLK_IN/OUT
DiSEqC_OUT_B
TC_ADC_P_B
TC_ADC_N_B
S_ADC_IP_B
S_ADC_IN_B
S_ADC_QP_B
S_ADC_QN_B
MP_B_B
MP_D_B
ADC_A
ADC_A
ADC_A
DiSEqC_A
DiSEqC_B
ADC_B
ADC_B
ADC_B
1.2, 3.3V RESETB
Si21692D
DEMODULATOR_A CORE
TS_A
I2C Block_A
I2C Block_B
TS_B
DEMODULATOR_B CORE
Dual Digital Demodulators
Copyright © 2015 by Silicon Laboratories
TS1_SYNC
TS1_DATA
TS1_VAL ⁸
TS1_CLK
GPIO1/
TS_ERR_A
ADDR_A
SDA_HOST
SCL_HOST
ADDR_B
GPIO0/
TS_ERR_B
TS2_SYNC
TS2_DATA
TS2_VAL ⁸
TS2_CLK
11.5.15