SI2166-D60 Datasheet, PDF (1/2 Pages) Silicon Laboratories – DVB-S/S2/S2X Digital TV Demodulator

Si2166-D60
DVB-S/S2/S2X Digital TV Demodulator
Description
The Si2166D integrates digital demodulators for first and second
generation satellite DVB standards (DVB-S/S2 and S2X) in a
single advanced CMOS die. Leveraging Silicon Labs' proven
digital demodulation architecture, the Si2166D achieves excellent
satellite reception performance while significantly minimizing
front-end design complexity, cost, and power dissipation.
Connecting the Si2166D to a satellite silicon tuner results in a
high-performance and cost optimized TV or STB front-end
solution.
The satellite reception allows demodulating widespread DVB-S,
DIRECTV™ (DSS), DVB-S2, DIRECTV™ (AMC) legacy
standards, and new Part II of DVB-S2 (S2X) satellite broadcast
standard. A zero-IF interface (differential) allows for a seamless
connection to market proven satellite silicon tuners. Si2166D
embeds DiSEqC^TM 2.0 LNB interface for satellite dish control and
an equalizer to compensate for echoes in long cable feeds from
the antenna to the satellite tuner input.
The Si2166D offers an on-chip blind scan algorithm for DVB-S/S2/
S2X standards, as well as a blind lock function. The Si2166D
programmable transport stream output interface provides a flexible
range of output modes and is fully compatible with all MPEG
decoders or conditional access modules to support any customer
application.
Features
- Pin-to-pin compatible with all Si216x/8x single demods family
- API compatible with all single and dual demods families
- DVB-S2 (ETSI EN 302 307-1 V1.4.1)
- QPSK/8PSK demodulator
- DVB-S2X (ETSI EN302 307-2 V1.1.1)
- Support the normative broadcast services
- QPSK/8PSK, 8/16/32APSKdemodulator
- Roll-off factors from 0.05 to 0.35
- VCM supported
- ISSY and NPD supported
- MIS supported
- Output modes: TS, GPCS, and GSE-HEM supported
- DVB-S and DSS supported
- QPSK demodulator and enhanced FEC decoder
- 1 to 45 MSymbol/s for all satellite standards (<40 MSps in
32APSK)
- LDPC and BCH FEC decoding for DVB-S2/S2X standards
- I²C serial bus interfaces (master and host)
- Firmware control (embedded ROM/NVM)
- Upgradeable with patch download via I²C or fast SPI
- Flexible TS output interface (serial, parallel, and slave)
- DiSEqC^TM 2.0 interface and Unicable^TM support
- Fast lock times
- Low power consumption
- Two power supplies: 1.2 and 3.3 V
- 7x7 mm, QFN-48 pin package, Pb-free/RoHS compliant
Applications
- Full-NIM
- iDTV (integrated Digital TV)
- Digital satellite STB
- PC-TV accessories
- PVR, DVD, and Blue Ray disc recorders
1.2, 3.3V RESETB
QPSK/8PSK/xAPSK
Satellite
ZIF Tuner
S_ADC_IP
S_ADC_IN
S_ADC_QP
S_ADC_QN
MP_x
DiSEqC^TM
2.0
DSP &
SYNCHRO
ADC (I)
ADC (Q)
AGCs
FRONT
END
x(A)PSK
DEMOD
EQUAL-
IZER
VITERBI
LDPC
CTRL
RS
BCH
GPIO
TS_ERR/
GPIO_1
TS_SYNC
TS_VAL
TS_CLK
TS_DATA
8
Ext. Clk or Xtal
CLK_IN_OUT
TUN_SDA
TUN_SCL
I²C
SWITCH
OSC
& PLL
DVB-S/S2/S2X
FEC MODULE
Si2166D
HOST_SDA
I²C
I/F
HOST_SCL
Digital Demodulator
Copyright © 2015 by Silicon Laboratories
10.14.15