CP2120-EK Datasheet, PDF (1/8 Pages) Silicon Laboratories – EVALUATION KIT USERS GUIDE

CP2120-EK
CP2120 EVALUATION KIT USER’S GUIDE
1. Kit Contents
The CP2120 Evaluation Kit contains a CP2120 evaluation board and a power supply. The following supporting
documents can be downloaded from www.silabs.com:
„ CP2120 Data Sheet
„ AN311: CP2120 Porting Guide
2. CP2120 Hardware Interface
The evaluation board is connected to a SPI master and to SMBus devices as shown in Figure 1.
1. Connect the SPI Master’s SPI bus lines to the CP2120. If The CP2120 is the only SPI slave device on the
SPI bus, then the CS pin can be tied low.
2. Connect the CP2120’s INT pin to a port pin of the SPI Master.
3. Connect the CP2120 to SMBus devices through the SMBus lines.
Please refer to "4. Evaluation Board" on page 2 for more information about these steps.
SPI Master
SPI Bus
MOSI
SCK
CS
MISO
INT
CP2120
SMBus
SDA
SCL
SMBus
Device
SMBus
Device
SMBus
Device
3. CP2120 Operation
Figure 1. System Connections
Once connected as shown in Figure 1, the SPI Master issues commands to the CP2120 across the SPI bus. The
CP2120 responds to commands by initiating an SMBus transfer with SMBus slave devices, reading from or writing
to internal registers, or interfacing with general purpose input/output (I/O) port pins. When an SMBus transaction
completes, the CP2120 pulls the INT pin low, which signals the SPI Master that the command has been processed.
Rev. 0.1 9/06
Copyright © 2006 by Silicon Laboratories
CP2120-EK