CP2108 Datasheet, PDF (1/30 Pages) Silicon Laboratories – SINGLE-CHIP USB-TO-QUAD-UART BRIDGE

CP2108
SINGLE-CHIP USB-TO-QUAD-UART BRIDGE
Single-Chip USB-to-QUAD UART Data Transfer
Four independent UART interfaces
Integrated USB transceiver; no external resistor
required
Integrated clock; no external crystal required
Integrated programmable EEPROM for storing
customizable product information
On-chip power-on reset circuit
On-chip voltage regulator: 3.3 V output
USB Peripheral Function Controller
USB Specification 2.0 compliant; full-speed (12 Mbps)
USB suspend states supported via SUSPEND pins
Virtual COM Port Drivers
Works with existing COM port PC applications
Royalty-free distribution license
Windows 8/7/Vista/XP/Server 2003
Mac OS X
Linux
Supply Voltage
Self-powered: 3.0 to 3.6 V
USB bus powered: 4.0 to 5.5 V
V_IO voltage: 3.0 to VDD
V_IOHD voltage: 2.7 to 6 V
UART Interface Features
Each UART interface supports the following:
Supports hardware flow control (RTS/CTS)
Supports all modem control signals
Data formats supported:
- Data bits: 5, 6, 7, and 8
- Stop bits: 1, 1.5, and 2
- Parity: odd, even, set, mark and none
Baud rates: 300 bps to 2 Mbps
UART 3 (pins 1–6) supports interfacing to devices up to
6V
GPIO Interface Features
Total of 16 GPIO pins with configurable options
Suspend pin support
Usable as inputs, open-drain or push-pull outputs
4 configurable clock outputs for external devices
RS-485 bus transceiver control
Toggle LED upon transmission
Toggle LED upon reception
Package Options
RoHS-UART 3 compliant 64-pin QFN (9x9 mm)
Temperature Range
–40 to +85 °C
Ordering Part Number
CP2108-B02-GM
Connect to VBUS
or External Supply
USB
Connector
VBUS
D+
D-
GND
(3.0 V to VDD)
(2.7 to 6.0 V)
VREGIN
VDD
Voltage
Regulator
80 MHz
Oscillator
VSS
USB Interface
VBUS
Full-Speed Peripheral
D+
12 Mbps
Function
D-
Transceiver Controller
CP2108
Baud Rate
Generator
Clock Divider
Data
FIFO
6
Handshake Control
UARTn (0-3)
VIO
RESET
VIO
VIOHD
18
EEPROM
(Product Customization)
I/O Power and Logic Levels UART0-2, GPIO, SUSPEND, RESET
High Drive UART 3(Pins 1-6)
RI(0-3)
DCD(0-3)
DTR(0-3)
DSR(0-3)
RTS(0-3)
CTS(0-3)
RX(0-3)
TX(0-3)
GPIO.0 – GPIO.15
SUSPEND
/SUSPEND
UART0
UART1
UART2
UART3
Figure 1. Example System Diagram
Rev. 1.1 2/14
Copyright © 2014 by Silicon Laboratories
CP2108