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C8051T622 Datasheet, PDF (1/3 Pages) Silicon Laboratories – Full Speed USB EEPROM MCU Family
C8051T622/623/326/327
Full Speed USB EEPROM MCU Family
USB Function Controller
- USB specification 2.0 compliant
- Full speed (12 Mbps) or low speed (1.5 Mbps) operation
- Integrated clock recovery; no external oscillator required for full speed or
low speed
- Supports six flexible endpoints
- 256-byte USB buffer memory
- Integrated transceiver; no external resistors required
On-Chip Debug
- C8051F34A can be used as code development platform; Complete
development kit available
- On-chip debug circuitry facilitates full speed, nonintrusive in-system
debug
- Provides breakpoints, single stepping, inspect/modify memory and regis-
ters
Memory
- 1280 bytes internal data RAM (256 + 1024)
- 16 kB byte-programmable EPROM code memory
- EPROM can be programmed from firmware running on the device
Supply Voltage: 1.8 to 5.25 V
- On-chip LDO for internal core supply
- Built-in supply voltage monitor
Temperature Range: –40 to +85 °C
High-Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of instructions in 1 or 2
system clocks
- Up to 48 MIPS throughput with 48 MHz clock
- Expanded interrupt handler
Digital Peripherals
- Up to 16 port I/O with high sink current capability
- Hardware enhanced SPI™, SMBus™, and two enhanced UART serial
ports
- Four general purpose 16-bit counter/timers
- 16-bit programmable counter array (PCA) with five capture/compare
modules and enhanced PWM functionality
Clock Sources
- Two internal oscillators:
• 48 MHz: ±0.25% accuracy with clock recovery enabled. 
Supports all USB and UART modes
• 80/40/20/10 kHz low frequency, low power
- External oscillator: Crystal, RC, C, or CMOS Clock
- Can switch between clock sources on-the-fly; useful in power saving
modes
Package Options
- 4x4 mm QFN24
- 5x5 mm QFN28
C2CK/RST
REGIN
VDD
GND
D+
D-
VBUS
Power On
Reset
Reset
Debug /
Programming
Hardware
CIP-51 8051
Controller Core
16k/8k Byte OTP
Program Memory
256 Byte SRAM
C2D
In-system
Programming
Hardware
1024 Byte XRAM
VPP
Voltage
Regulator
Peripheral Power
Regulator
Core Power
XTAL1
XTAL2
System Clock Setup
External Oscillator
Internal Oscillator
Clock
Recovery
Low Freq.
Oscillator
SFR
Bus
USB Peripheral
Full / Low
Speed
Transceiver
Controller
256 Byte
RAM
Port I/O Configuration
Digital Peripherals
UART0
UART1
Timers 0,
1, 2, 3
PCA/
WDT
Priority
Crossbar
Decoder
SMBus
SPI
Crossbar Control
Port 0
Drivers
Port 1
Drivers
Port 2
Drivers
Note 1: Not available on C8051T327 devices.
Note 2: Not available on C8051T326/7 devices.
VIO1
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.62
P2.0/C2D
USB
Copyright © 2011 by Silicon Laboratories
01.21.11