C8051F96X Datasheet, PDF (1/2 Pages) Silicon Laboratories – Ultra-Low-Power, High-Efficiency, Battery-Powered Metering MCU

C8051F96x
Ultra-Low-Power, High-Efficiency, Battery-Powered Metering MCU
Ultra-Low Power @ 3.6 V
- 110 µA/MHz, Low-Power Active, DC-DC enabled
- 110 nA sleep current with data retention; POR monitor enabled
- 400 nA sleep current with smaRTClock (internal LFO)
- 700 nA sleep current with smaRTClock (external XTAL)
- 2 µs wake-up from any sleep mode
12-Bit; 16 ch. Analog to Digital Converter
- Up to 75 ksps, 12-bit mode or 300 ksps 10-bit mode
- External pin or internal VREF (no external capacitor required)
- On-chip PGA allows measuring voltages up to twice the 
reference voltage
- Autonomous burst mode with 16-bit automatic averaging 
accumulator
- Integrated temperature sensor
Two Low Current Comparators
- Programmable hysteresis and response time
- Configurable as interrupt or reset source
Internal 6-Bit Current Reference
- Up to ±500 µA; source and sink capability
- Enhanced resolution via PWM interpolation
Integrated LCD Controller
- Supports up to 128 segments (32x4)
- Integrated charge pump for contrast control
Metering-Specific Peripherals
- DC-DC buck converter allows dynamic voltage scaling for 
maximum efficiency (250 mW output)
- Sleep-mode pulse accumulator with programmable switch 
de-bounce and pull-up control interfaces directly to metering
sensor
- Data Packet Processing Engine (DPPE) includes hardware
AES, DMA, CRC, and encoding blocks for acceleration of wire-
less protocols
- Manchester and Three-out-of-Six encoder hardware for power-
efficient implementation of the wireless M-bus specification
High-Speed Enhanced 8051 µC Core
- Pipe-lined instruction architecture executes 70% of instructions
in 1 or 2 system clocks
Memory
- Up to 128 kB Flash; In-system programmable; Full read/write/
erase functionality over the entire supply range
- Up to 8 kB data retention RAM
Digital Peripherals
- Up to 57 port I/O; All 5 V tolerant with programmable drive
strength
- Hardware enhanced UART, 2 SPI and I²C serial ports available
concurrently
- Four general-purpose 16-bit counter/timers
- 16-bit programmable counter array (PCA) with six capture/com-
pare/PWM modules and watchdog timer
Clock Sources
- Precision internal oscillators: 24.5 MHz with ±2% accuracy sup-
ports UART operation; spread-spectrum mode for reduced EMI
- Low power internal oscillator: 20 MHz
- External oscillator: Crystal, RC, C, CMOS clock
- SmaRTClock oscillator: 32.768 kHz crystal or 16.4 kHz internal
LFO with three independent alarms
On-Chip Debug
- On-chip debug circuitry facilitates full speed, non-intrusive in-
system debug (no emulator required)
- Provides four breakpoints, single stepping
Package Options
- 76-pin DQFN (6x6 mm), RoHS compliant
- 40-pin QFN (6x6 mm), RoHS compliant
- 80-pin QFP (12x12 mm), RoHS compliant
Development Kit: C8051F960DK
Supply Voltage: 1.8 to 3.8 V
Temperature Range: –40 to +85 °C
C2CK/RST
VBAT
VDC
VBATDC
IND
GNDDC
CAP
GND
Power On
Reset/PMU
Wake
Reset
Debug /
Programming
Hardware
CIP-51 8051
Controller Core
128k Byte ISP Flash
Program Memory
256 Byte SRAM
8092 Byte XRAM
C2D
VBAT
VDD
VREG
Analog
Power
Digital
Power
DC/DC Buck
Converter
Precision
24.5 MHz
Oscillator
DMA
CRC
Engine
AES
Engine
Encoder
SYSCLK
LCD Charge
Pump
Low Power
20 MHz
Oscillator
XTAL1
XTAL2
External
Oscillator
Circuit
XTAL3
XTAL4
Enhanced
smaRTClock
Oscillator
System Clock
Configuration
SFR
Bus
Port I/O Configuration
Digital Peripherals
UART
Timers
0, 1, 2, 3
PCA/WDT
SMBus
Priority
Crossbar
Decoder
SPI 0
SPI 1
(DMA Enabled)
Crossbar Control
LCD (up to 4x32)
EMIF
Pulse Counter
Analog Peripherals
Internal External
VREF VREF
12-bit
A
75ksps
ADC
M
U
X
VDD
VREF
Temp
Sensor
GND
CP0, CP0A +
-
CP1, CP1A +
-
Comparators
Port 0
Drivers
Port 1
Drivers
Port 2
Drivers
P3-6
Drivers
P7
Driver
P0.0/VREF
P0.1/AGND
P0.2/XTAL1
P0.3/XTAL2
P0.4/TX
P0.5/RX
P0.6/CNVSTR
P0.7
P1.0/PC0
P1.1/PC1
P1.2/XTAL3
P1.3/XTAL4
P1.4
P1.5/INT5
P1.6/INT6
P1.7
P2.0/SCK1
P2.1/MISO1
P2.2/MOSI1
P2.3/NSS1
P2.4
P2.5
P2.6
P2.7
32
P3.0...P6.7
16
P7.0/C2D
Low-Voltage/Low-Power
Copyright © 2011 by Silicon Laboratories
11.03.11