English
Language : 

C8051F700_14 Datasheet, PDF (1/2 Pages) Silicon Laboratories – 25 MIPS, 15 kB Flash, 10-Bit ADC, 64-Pin Mixed-Signal MCU
C8051F700/1
25 MIPS, 15 kB Flash, 10-Bit ADC, 64-Pin Mixed-Signal MCU
High-Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of instructions in 1 or 2
system clocks
- Up to 25 MIPS throughput with 25 MHz system clock
Memory
- 15 kB Flash; in-application programmable in 512-byte sectors
- 32 bytes Data EEPROM with 100,000 cycle read/write endurance
- 512 bytes data RAM
- External parallel data memory interface
Analog Peripherals
10-Bit Analog to Digital Converter (‘F700)
- Up to 500 ksps
- 16 external inputs
- On-chip voltage reference (may use VDD or external voltage)
- Built-in temperature sensor
- External conversion start input option
Comparator
- Programmable hysteresis and response time
- Configurable as interrupt or reset source
Capacitive Touch Sense
- 16-bit capacitance-to-Digital Converter
- Superior Noise Immunity and fast 40us aquisition time
- Up to 32 external inputs
- Auto-scan and compare
- Auto-accumulate 4x, 8x, and 16x samples
Digital Peripherals
Up to 54 Port I/O with high sink current
- Flexible configuration using digital crossbar
- Many can be configured for analog or digital function
- Every pin can be optimized for its best use
Serial Communications
- HW enhanced UART
- SMBusTM (I2C compatible)
- Enhanced SPITM
User Programmable Timing Functions
- Four general purpose 16-bit counter/timers
- 16-bit programmable counter array (PCA) with three capture/compare
modules and enhanced PWM capability
- Real-time clock mode using enhanced timer and crystal
Clock Sources
- Calibrated Internal programmable oscillator
• Calibrated to 2% accuracy over temp and Vdd
• 24.5 MHz to allow max speed CPU operation
• Supports crystal-less UART operation
- External oscillator: Crystal, RC, C, or Clock
- Can switch between clock sources on-the-fly
Supply Voltage: 1.8 to 3.3 V
- Built-in voltage supply monitor
Temperature Range: –40 to +85 °C
TQFP-64 Package
CIP-51 8051
Controller Core
C2CK/RST
Power On
Reset
Reset
Debug /
Programming
Hardware
C2D
Peripheral Power
15 kB Flash Memory
256 Byte RAM
256 Byte XRAM
32 Bytes EEPROM
VDD
GND
Regulator
SYSCLK
Core Power
XTAL1
XTAL2
Precision
Internal
Oscillator
External
Clock
Circuit
System Clock
Configuration
SFR
Bus
Port I/O Configuration
Digital Peripherals
UART
Timers 0,
1, 2, 3
Timer 3 /
RTC
PCA
Priority
Crossbar
Decoder
SPI
WDT
SMBus
Crossbar Control
External Memory
Interface
P6
Control
Address
P4 / P3
P5
Data
Port 0
Drivers
Port 1
Drivers
Port 2 . . .
Drivers
Port 3 . . .
Drivers
Port 4 . . .
Drivers
Port 5 . . .
Drivers
Port 6 . . .
Drivers
Analog Peripherals
VDD
Capacitive
Sense
+
-
Comparator
VREF
(‘F700 Only)
10-bit
A
500 ksps
M
U
ADC
X
VDD
Temp Sensor
P0.0 / VREF
P0.1 / AGND
P0.2 / XTAL1
P0.3 / XTAL2
P0.4
P0.5
P0.6
P0.7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P2.0
P2.7
P3.0
P3.7
P4.0
P4.7
P5.0
P5.7
P6.0
P6.5
Precision Mixed Signal
Copyright © 2009 by Silicon Laboratories
2.16.2009