C8051F126 Datasheet, PDF (1/2 Pages) Silicon Laboratories – 50 MIPS, 128 kB Flash, 10-Bit ADC, 100-Pin Mixed-Signal MCU

C8051F126
50 MIPS, 128 kB Flash, 10-Bit ADC, 100-Pin Mixed-Signal MCU
Analog Peripherals
10-Bit ADC
- ±1 LSB INL; no missing codes
- Programmable throughput up to 100 ksps
- 8 external inputs; programmable as single-ended or differential
- Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5
- Data-dependent windowed interrupt generator
- Built-in temperature sensor (±3 °C)
8-Bit ADC
- ±1 LSB INL; no missing codes
- Programmable throughput up to 500 ksps
- 8 external inputs
- Programmable amplifier gain: 4, 2, 1, 0.5
Two 12-Bit DACs
- Can synchronize outputs to timers for jitter-free waveform generation
Two Comparators
Internal Voltage Reference
V_DD Monitor/Brown-out Detector
On-Chip JTAG Debug & Boundary Scan
- On-chip debug circuitry facilitates full speed, non-intrusive in-system
debug (no emulator required)
- Provides breakpoints, single stepping, watchpoints, stack monitor
- Inspect/modify memory and registers
- Real-time instruction trace buffer
- IEEE1149.1 compliant boundary scan
High-Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of instructions in 1 or 2
system clocks
- Up to 50 MIPS Throughput with 50 MHz system clock
- Expanded interrupt handler
Memory
- 8448 bytes data RAM
- 128 kB Flash; in-system programmable in 1024-byte sectors (1024 bytes
are reserved)
- External parallel data memory interface
Digital Peripherals
- 64 port I/O; all are 5 V tolerant
- Hardware SMBus™ (I2C™ compatible), SPI™, and two UART serial
ports available concurrently
- Programmable 16-bit counter/timer array with six capture/compare
modules
- 5 general-purpose 16-bit counter/timers
- Dedicated watchdog timer; bidirectional reset
- Real-time clock mode using a timer or PCA
Clock Sources
- Internal oscillator: 24.5 MHz, 2% accuracy supports UART operation
- On-chip programmable PLL: up to 50 MHz
- External oscillator: Crystal, RC, C, or Clock
Supply Voltage: 2.7 to 3.6 V
- Typical operating current: 25 mA at 50 MHz
- Typical stop mode current: <0.1 uA
100-Pin TQFP
Temperature Range: –40 to +85 °C
VDD
VDD
VDD
DGND
DGND
DGND
AV+
AV+
AGND
AGND
TCK
TMS
TDI
TDO
RST
MONEN
XTAL1
XTAL2
VREF
VREFD
DAC1
DAC0
VREF0
AIN0.0
AIN0.1
AIN0.2
AIN0.3
AIN0.4
AIN0.5
AIN0.6
AIN0.7
CP0+
CP0-
CP1+
CP1-
Digital Power
Analog Power
JTAG ^{Boundary Scan}
Logic _{Debug HW}
8
0
5
1
Reset
VDD
Monitor
External
Oscillator
Circuit
WDT
Internal
2%
Oscillator
N/M
PLL
VREF
C
o
System
Clock
r
e
DAC1
(12-Bit)
SFR Bus
256 Byte
Branch
Target Buffer
8
Prefetch
HW
32
128 kB
FLASH
256 Byte
RAM
8 kB
XRAM
External Data Memory Bus
DAC0
(12-Bit)
A
M
Prog
U
Gain
X
CP0
TEMP
SENSOR
CP1
ADC
100 ksps
(10-Bit)
UART0
UART1
SMBus
SPI Bus
6 Chnl
PCA
Timers
0, 1, 2, 4
Timer 3
P0, P1,
P2, P3
Latches
P0
Drv
C
R
P1
O
Drv
S
S
B
P2
Drv
A
R
P3
Drv
ADC
500 ksps
(8-Bit)
A
Prog
M ^8:1
Gain
U
X
Bus Control
C P4 Latch
T
L
Address Bus
P5 Latch
A
d
d P6 Latch
r
Data Bus
D _{P7 Latch}
a
t
a
P4
DRV
P5
DRV
P6
DRV
P7
DRV
P0.0
P0.7
P1.0/AIN1.0
P1.7/AIN1.7
P2.0
P2.7
P3.0
P3.7
VREF1
P4.0
P4.4
P4.5/ALE
P4.6/RD
P4.7/WR
P5.0/A8
P5.7/A15
P6.0/A0
P6.7/A7
P7.0/D0
P7.7/D7
Precision Mixed Signal
Copyright © 2004 by Silicon Laboratories
10.6.2004