AN352 Datasheet, PDF (1/4 Pages) Silicon Laboratories – LOW-COST, HIGH-SPEED I2C ISOLATION WITH DIGITAL ISOLATORS

AN352
LOW-COST, HIGH-SPEED I2C ISOLATION WITH DIGITAL ISOLATORS
1. Introduction
Many articles have been published using opto-couplers
for I2C isolation (See “5. References” on page 3). These
circuits are somewhat complex, sensitive to bus
capacitance, and limited in speed. They are also not
compatible with high-speed digital isolators having
standard CMOS input levels.
This application note shows how to convert a standard
Si8442 high-speed digital isolator to a bidirectional I2C
isolator. In addition to being compatible with digital
isolators, the circuit is simpler than previously published
solutions, completely insensitive to bus capacitance,
and can easily support the standard 400 kHz maximum
I2C bus rate.
Side A
Driver
Isolator
A
Isolator
B
Side B
Driver
2. Difficulty of Making a Bidirectional
Circuit
Standard I2C SDA and SCL signals are driven by open
drain drivers. In all cases, SDA can be driven by any
device on the bus so that the SDA bus wire
communicates information from the I2C master to the
slaves and from the slaves to the master. That is, the
data transfer is bidirectional. In some cases, the SCL
only has a driver for the I2C master. However, in many
cases, such as multiple I2C masters or if the slave
needs to stretch SCL by holding it low while it retrieves
data, the SCL line must also be bidirectional.
For the wires that need to be bidirectional, if digital
isolators are inserted as in Figure 1, there are several
problems:
„ The isolators must be open-drain.
„ There is a latch-up condition that can occur. If, for
example, the side A driver pulls low, isolator A pulls
low on side B. This causes isolator B to pull low on
side A, and the circuit latches with both isolators
pulling low.
Figure 1.
The open drain problem is easily solved by putting a
Schottky diode in series with the isolator output.
However, the latch up problem is much more difficult to
solve.
Previous attempts to solve this problem have used
diodes inherent to the opto-coupler input and additional
circuitry to avoid the latch-up condition (See “5.
References” on page 3). Some of these approaches are
sensitive to bus capacitance. They tend to be slow due
to the slow response of the opto-couplers. Finally, when
higher speed digital isolators with standard CMOS input
levels are used, the circuit tricks using the diode input of
the opto-couplers no longer apply.
3. Circuit Using Digital Isolators
The full circuit using a Silicon Laboratories, Inc. Si8442
high-speed isolator is shown in Figure 2. The circuit
assumes 1 kΩ pull-up resistors on the SCL and SDA
lines. It can be easily adjusted for other bus pull-up
resistors. This circuit has been tested with Silicon
Laboratories, Inc. C8051Fxxx series MCUs at a bus
speed of approximately 300 kHz including bus
transactions that require SCL clock stretching.
Rev. 1.0 8/08
Copyright © 2008 by Silicon Laboratories
AN352