AN313 Datasheet, PDF (1/6 Pages) Silicon Laboratories – USING THE Si3400 AND Si3401 IN HIGH POWER APPLICATIONS

AN313
USING THE Si3400 AND Si3401 IN HIGH POWER APPLICATIONS
1. Introduction
Emerging Power over Ethernet (PoE) applications, such
as multi-band and 802.11n access points, often require
more power than the 12.95 W specified by the IEEE
802.3af. This application note outlines how to use the
Si3400 and Si3401 to support powered device (PD)
applications over 15 W output, which corresponds to
about 20 W of input power from the PSE.
The current standard for Power over Ethernet or PoE is
IEEE Std™ 802.3-2005, clause 33. Although there is
currently no ratified standard beyond this, a standard,
commonly referred to as PoE+, is being actively
developed in the p802.3at subcommittee. While this
note attempts to be consistent with the general direction
in discussion by the p802.3at committee, it should be
emphasized that no standard currently exists to support
power above the current specification's 12.95 W
maximum of power available at the PD. The proposed
solutions in this document are intended to serve as
practical solutions for higher power PDs before p802.3at
is ratified.
Based on current discussions in the p802.3at
committee, it appears likely that the minimum PSE
output voltage will be increased, and the maximum
cable resistance will be decreased to support PoE Plus.
It is also likely that there will be a provision for
classifying at the current maximum supported power of
12.95 W input and then negotiating with the PSE for
higher power via a simple data exchange with the
Ethernet switch using, for example, the 802.3 (LLDP)
layer.
2. Power and Thermal
Considerations
The Si3400 and Si3401 were intentionally designed with
"hot swap" switch current limits well above the 350 mA
maximum current specification of 802.3af so as not to
limit the PD from drawing more power from a PSE as
long as the PSE is capable of providing the power. The
typical value is 525 mA for the Si3400 and 550 mA for
the Si3401. Also, the switcher FET is designed for
current levels of up to 4 A with a very low on-resistance
of 0.5 Ω (typical). What this means is that the Si3400
and Si3401 are capable of operating at higher power
levels, subject to thermal constraints and proper thermal
management on the PCB. While the exact voltage and
cable resistance have not yet been determined for the
PoE+ or 802.3at applications, it is estimated that
support of 15 W output power will require a minimum
hot swap switch current limit of about 470 mA. The
Si3401 supports a minimum hot swap current limit of
470 mA.
For a typical 5 V isolated application, the dissipation of
the Si3400 and Si3401 is 1.2 W for the maximum power
of 10 W output with 12.95 W input power. This results in
a thermal rise of 54 °C (plus heating due to other
components), which is close to the typical 160 °C
thermal shutdown temperature specification of the
Si3400 and Si3401 when the ambient temperature is
85 °C. While the Si3400 and Si3401 are designed to
handle the 12.95 W power level, there is simply too
much power dissipation in the Si3400 and Si3401
packages when used beyond this currently-specified
limit. To work around this, it is possible to bypass the
Si3400’s and Si3401's two internal diode bridges using
the circuit shown in Figure 1.
Vposf
CT1
CT2
SP1
SP2
Si3400
Si3401
Vneg
Figure 1. Internal Diode Bridge Bypass
It is recommended that the diode bridges internal to the
Si3400 and Si3401 remain connected so as to allow the
early power loss feature (PLOSS signal) to remain
active. Low-cost diodes, such as 1N4002, can be used
to bypass the diodes on the Si3400 and Si3401
because they have a slightly lower voltage drop. This
will help spread the heat in higher power applications.
For higher efficiency, Schottky diodes can be used. It is
also possible to use just the upper four or lower four
diodes for half the benefit at half the cost.
Using the full bypass, the power in the Si3400 and
Si3401 is reduced to 0.5 W at 5 V/2 A output and
0.83 W at 5 V/3 A (15 W) output. Both of these power
levels are well within the thermal capability of the
Si3400 and Si3401 packages.
With the one-half bypass, the power in the Si3400 and
Si3401 packages is at the 1.2 W maximum for a 5 V/
2.6 A (13 W) load.
Rev. 0.2 12/06
Copyright © 2006 by Silicon Laboratories
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