AN266 Datasheet, PDF (1/8 Pages) Silicon Laboratories – VCXO TUNING SLOPE, STABILITY, AND ABSOLUTE PULL RANGE

AN266
V C X O TUNING S LOPE ( K V) , STABILITY, AND A BSOLUTE
PULL RANGE (APR)
1. Introduction
2. VCXO Tuning Slope (Kv)
VCXO devices are typically used in phase lock loop
(PLL) circuits to generate an output clock signal that is
phase locked to a reference clock signal. One of the key
design parameters for a PLL circuit is the range over
which it can track variations in the reference clock
frequency. The PLL tracking range is dictated by the
"absolute pull range" (APR) of the VCXO. The APR is a
function of the VCXO's total frequency stability and the
VCXO's pullability, or "pull range." The VCXO pullability,
in turn, is a function of the VCXO's “tuning slope” (Kv).
This application note discusses the relationship
between the tuning slope (Kv), the pullability, the
frequency stability, and the APR specifications for
VCXO devices. It is important to understand the
relationship between these specifications in order to
effectively compare competing VCXO devices or to
properly specify a VCXO for a particular application.
A voltage controlled crystal oscillator (VCXO) is a
crystal oscillator whose output frequency can be
adjusted by varying the voltage applied to a V_CONTROL
input pin.
The “tuning slope”, or voltage-to-frequency gain, of the
VCXO specifies the amount of frequency change that
results from a given change in the control voltage. A
frequency vs. control voltage curve that is
representative of a traditional VCXO device is depicted
in Figure 1.
+150
+100
+50
Kv =
67 ppm/V
“Kv typical” = 97 ppm/V
“Linearity” = (± 8 ppm) /
(260 ppm total deviation)
= ± 3.1%
0
-50
-100
Kv =
150 ppm/V
-150
0
0.5 1.0 1.5 2.0 2.5 3.0
Control Voltage, Vc (V)
Figure 1. Traditional VCXO Output Frequency vs. Control Voltage Plot
Rev. 0.2 10/10
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