AN123 Datasheet, PDF (1/16 Pages) Silicon Laboratories – USING THE DAC AS A FUNCTION GENERATOR

AN123
USING THE DAC AS A FUNCTION GENERATOR
Relevant Devices
Implementation
This application note applies to the following devices:
C8051F020, C8051F021, C8051F022, and
C8051F023.
Introduction
This document describes how to implement an
interrupt driven multifunction generator on C8051
devices using the on-chip digital-to-analog con-
verter (DAC).
The main routine of this program is a command
interpreter that sets parameters for the Timer 4
interrupt service routine (ISR) which manages the
DAC updates. The Timer 4 interrupts occur at a
predetermined rate set at compile time. In the
included software example, this value is stored in
the constant <SAMPLE_RATE_DAC>. The
Timer 4 ISR updates the DAC and calculates or
looks up the next output value based on the wave-
form settings.
Features
• Four different waveforms expandable to any
periodic function defined in a table.
- Sine Wave (Table Defined)
- Square Wave (Calculated)
- Triangle Wave (Calculated)
Setting up the DAC
Any free DAC, referred to as DACn, may be used
to generate waveforms. In this example DACn is
used in left-justified mode with output scheduling
based on Timer 4 overflows. Refer to the data sheet
for specific information on how to set the DAC-
nCN register to specify DACn modes.
- Saw Tooth Wave (Calculated)
• Allows selection of the frequency and ampli-
tude of waveform at run time.
• An interactive interface with a PC using the
serial communications port and HyperTerminal
or an equivalent program.
Key Points
When the DAC is configured to left-justified mode,
16-bit data can be written to the 12-bit data register
with no shifting required. In this case, the 4 least
significant bits are ignored.
In this example, DACn updates occur on Timer 4
overflows, meaning writes to DACnH and DACnL
have no immediate effect on the DAC output, but
instead are held until the next Timer 4 overflow.
• Output waveforms have 16-bit frequency reso- _{Another important note is that the internal voltage}
lution using the phase accumulator approach. _{reference must be enabled by setting the appropri-}
• The on-chip DAC’s can support waveform gen- _{ate bits in the REFnCN register before the DAC}
eration up to 50 kHz.
can be used.
• By using a 16-bit lookup table with a 12-bit
DAC, error in the amplitude is virtually elimi-
nated.
Sampling Rate
The sampling rate is configured by initializing the
Timer 4 reload value with the number of SYSCLK
Rev. 1.1 12/03
Copyright © 2003 by Silicon Laboratories
AN123-DS11