1005192 Datasheet, PDF (1/1 Pages) Silicon Laboratories – Added Freeze M procedure on page 14 for preventing output clock changes

Process Change Notice #1005192
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PCN Date: 19May10
Effective Date: 19Aug10
Title: Si570/571 Datasheet Revision from 1.1 to 1.2
Originator: Juan Conchas
Phone: [phone] Dept: Wireline
Customer Contact: Kathy Haggar Phone: [phone] Dept: Sales
PCN Type:
Assembly
Datasheet
Packing
Last Order Date: N/A
Discontinuance
Fabrication
Labeling
Package
Product Revision
Location
Test
Other
PCN Details
Description of Change:
Datasheet changes as outlined below were made to revision 1.2.
1. Renamed “Unfreeze to Newfreq Delay” with “Unfreeze to Newfreq Timeout” in Table 12.
2. Added Freeze M procedure on page 14 for preventing output clock changes during small
frequency multi-register RFREQ writes.
3. Added Freeze M, Freeze VCADC, and RST_REG versus RECALL information to Register 135
references in "4. Serial Port Registers" on pages 17and 20.
4. Updated Figure 8 and Table 16 on page 26 to include production test side pins. This change
is for reference only as the side pins are raised above the seating plane and do not impact
PCB layout. Side-pins have no electrical function in the end system.
5. Change document title to “Si570/571 10MHz to 1.4GHz I2C Programmable XO/VCXO.”
6. Remove mention of “Any-rate.”
Reason for Change: Datasheet update to support Freeze M procedure.
Impact on Form, Fit, Function, Quality, Reliability:
No impact to form, fit, function, quality or reliability.
Product Identification:
Si570, Si571
Last Date of Unchanged Product: N/A
Qualification Samples: N/A
Customer Early Acceptance Sign Off:
Customers may approve early PCN acceptance by completing the information below:
Early Acceptance Date:
Name:
Company:
Email your early Acceptance approval to: [e-mail]
Qualification Data: N/A
W7206F1 Process Change Notice Form rev X
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