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S1323 Datasheet, PDF (9/28 Pages) Seiko Instruments Inc – HIGH RIPPLE-REJECTION AND SMALL PACKAGE
HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR
Rev.5.1_00
S-1323 Series
 Standard Circuit
Input
CIN*1
VIN VOUT
ON/OFF
VSS
Output
CL*2
Single GND
GND
*1. CIN is a capacitor for stabilizing the input.
*2. A ceramic capacitor of 1.0 μF or more can be used in CL.
Figure 10
Caution The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
 Condition of Application
Input capacitor (CIN):
Output capacitor (CL):
ESR of output capacitor:
1.0 μF or more
1.0 μF or more
10 Ω or less
Caution Generally a series regulator may cause oscillation, depending on the selection of external
parts. Check that no oscillation occurs with the application using the above capacitor.
Seiko Instruments Inc.
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